// SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause /* Packet receive logic for Mellanox Gigabit Ethernet driver * * Copyright (C) 2020-2021 NVIDIA CORPORATION & AFFILIATES */ #include <linux/etherdevice.h> #include <linux/skbuff.h> #include "mlxbf_gige.h" #include "mlxbf_gige_regs.h" void mlxbf_gige_set_mac_rx_filter(struct mlxbf_gige *priv, unsigned int index, u64 dmac) { … } void mlxbf_gige_get_mac_rx_filter(struct mlxbf_gige *priv, unsigned int index, u64 *dmac) { … } void mlxbf_gige_enable_promisc(struct mlxbf_gige *priv) { … } void mlxbf_gige_disable_promisc(struct mlxbf_gige *priv) { … } /* Receive Initialization * 1) Configures RX MAC filters via MMIO registers * 2) Allocates RX WQE array using coherent DMA mapping * 3) Initializes each element of RX WQE array with a receive * buffer pointer (also using coherent DMA mapping) * 4) Allocates RX CQE array using coherent DMA mapping * 5) Completes other misc receive initialization */ int mlxbf_gige_rx_init(struct mlxbf_gige *priv) { … } /* Receive Deinitialization * This routine will free allocations done by mlxbf_gige_rx_init(), * namely the RX WQE and RX CQE arrays, as well as all RX buffers */ void mlxbf_gige_rx_deinit(struct mlxbf_gige *priv) { … } static bool mlxbf_gige_rx_packet(struct mlxbf_gige *priv, int *rx_pkts) { … } /* Driver poll() function called by NAPI infrastructure */ int mlxbf_gige_poll(struct napi_struct *napi, int budget) { … }