linux/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c

// SPDX-License-Identifier: GPL-2.0+
/* Microchip Sparx5 Switch driver
 *
 * Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries.
 */

#include <linux/module.h>
#include <linux/device.h>

#include "sparx5_main_regs.h"
#include "sparx5_main.h"

/* QSYS calendar information */
#define SPX5_PORTS_PER_CALREG …
#define SPX5_CALBITS_PER_PORT …

/* DSM calendar information */
#define SPX5_DSM_CAL_LEN …
#define SPX5_DSM_CAL_EMPTY …
#define SPX5_DSM_CAL_MAX_DEVS_PER_TAXI …
#define SPX5_DSM_CAL_TAXIS …
#define SPX5_DSM_CAL_BW_LOSS …

#define SPX5_TAXI_PORT_MAX …

#define SPEED_12500 …

/* Maps from taxis to port numbers */
static u32 sparx5_taxi_ports[SPX5_DSM_CAL_TAXIS][SPX5_DSM_CAL_MAX_DEVS_PER_TAXI] = …;

struct sparx5_calendar_data { … };

static u32 sparx5_target_bandwidth(struct sparx5 *sparx5)
{ … }

/* This is used in calendar configuration */
enum sparx5_cal_bw { … };

static u32 sparx5_clk_to_bandwidth(enum sparx5_core_clockfreq cclock)
{ … }

static u32 sparx5_cal_speed_to_value(enum sparx5_cal_bw speed)
{ … }

static u32 sparx5_bandwidth_to_calendar(u32 bw)
{ … }

static enum sparx5_cal_bw sparx5_get_port_cal_speed(struct sparx5 *sparx5,
						    u32 portno)
{ … }

/* Auto configure the QSYS calendar based on port configuration */
int sparx5_config_auto_calendar(struct sparx5 *sparx5)
{ … }

static u32 sparx5_dsm_exb_gcd(u32 a, u32 b)
{ … }

static u32 sparx5_dsm_cal_len(u32 *cal)
{ … }

static u32 sparx5_dsm_cp_cal(u32 *sched)
{ … }

static int sparx5_dsm_calendar_calc(struct sparx5 *sparx5, u32 taxi,
				    struct sparx5_calendar_data *data)
{ … }

static int sparx5_dsm_calendar_check(struct sparx5 *sparx5,
				     struct sparx5_calendar_data *data)
{ … }

static int sparx5_dsm_calendar_update(struct sparx5 *sparx5, u32 taxi,
				      struct sparx5_calendar_data *data)
{ … }

/* Configure the DSM calendar based on port configuration */
int sparx5_config_dsm_calendar(struct sparx5 *sparx5)
{ … }