linux/drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c

// SPDX-License-Identifier: GPL-2.0+
/* Microchip Sparx5 Switch driver
 *
 * Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries.
 *
 * The Sparx5 Chip Register Model can be browsed at this location:
 * https://github.com/microchip-ung/sparx-5_reginfo
 */

#include <linux/types.h>
#include <linux/skbuff.h>
#include <linux/netdevice.h>
#include <linux/interrupt.h>
#include <linux/ip.h>
#include <linux/dma-mapping.h>

#include "sparx5_main_regs.h"
#include "sparx5_main.h"
#include "sparx5_port.h"

#define FDMA_XTR_CHANNEL …
#define FDMA_INJ_CHANNEL …

#define FDMA_DCB_INFO_DATAL(x) …
#define FDMA_DCB_INFO_TOKEN …
#define FDMA_DCB_INFO_INTR …
#define FDMA_DCB_INFO_SW(x) …

#define FDMA_DCB_STATUS_BLOCKL(x) …
#define FDMA_DCB_STATUS_SOF …
#define FDMA_DCB_STATUS_EOF …
#define FDMA_DCB_STATUS_INTR …
#define FDMA_DCB_STATUS_DONE …
#define FDMA_DCB_STATUS_BLOCKO(x) …
#define FDMA_DCB_INVALID_DATA …

#define FDMA_XTR_BUFFER_SIZE …
#define FDMA_WEIGHT …

/* Frame DMA DCB format
 *
 * +---------------------------+
 * |         Next Ptr          |
 * +---------------------------+
 * |   Reserved  |    Info     |
 * +---------------------------+
 * |         Data0 Ptr         |
 * +---------------------------+
 * |   Reserved  |    Status0  |
 * +---------------------------+
 * |         Data1 Ptr         |
 * +---------------------------+
 * |   Reserved  |    Status1  |
 * +---------------------------+
 * |         Data2 Ptr         |
 * +---------------------------+
 * |   Reserved  |    Status2  |
 * |-------------|-------------|
 * |                           |
 * |                           |
 * |                           |
 * |                           |
 * |                           |
 * |---------------------------|
 * |         Data14 Ptr        |
 * +-------------|-------------+
 * |   Reserved  |    Status14 |
 * +-------------|-------------+
 */

/* For each hardware DB there is an entry in this list and when the HW DB
 * entry is used, this SW DB entry is moved to the back of the list
 */
struct sparx5_db { … };

static void sparx5_fdma_rx_add_dcb(struct sparx5_rx *rx,
				   struct sparx5_rx_dcb_hw *dcb,
				   u64 nextptr)
{ … }

static void sparx5_fdma_tx_add_dcb(struct sparx5_tx *tx,
				   struct sparx5_tx_dcb_hw *dcb,
				   u64 nextptr)
{ … }

static void sparx5_fdma_rx_activate(struct sparx5 *sparx5, struct sparx5_rx *rx)
{ … }

static void sparx5_fdma_rx_deactivate(struct sparx5 *sparx5, struct sparx5_rx *rx)
{ … }

static void sparx5_fdma_tx_activate(struct sparx5 *sparx5, struct sparx5_tx *tx)
{ … }

static void sparx5_fdma_tx_deactivate(struct sparx5 *sparx5, struct sparx5_tx *tx)
{ … }

static void sparx5_fdma_rx_reload(struct sparx5 *sparx5, struct sparx5_rx *rx)
{ … }

static void sparx5_fdma_tx_reload(struct sparx5 *sparx5, struct sparx5_tx *tx)
{ … }

static struct sk_buff *sparx5_fdma_rx_alloc_skb(struct sparx5_rx *rx)
{ … }

static bool sparx5_fdma_rx_get_frame(struct sparx5 *sparx5, struct sparx5_rx *rx)
{ … }

static int sparx5_fdma_napi_callback(struct napi_struct *napi, int weight)
{ … }

static struct sparx5_tx_dcb_hw *sparx5_fdma_next_dcb(struct sparx5_tx *tx,
						     struct sparx5_tx_dcb_hw *dcb)
{ … }

int sparx5_fdma_xmit(struct sparx5 *sparx5, u32 *ifh, struct sk_buff *skb)
{ … }

static int sparx5_fdma_rx_alloc(struct sparx5 *sparx5)
{ … }

static int sparx5_fdma_tx_alloc(struct sparx5 *sparx5)
{ … }

static void sparx5_fdma_rx_init(struct sparx5 *sparx5,
				struct sparx5_rx *rx, int channel)
{ … }

static void sparx5_fdma_tx_init(struct sparx5 *sparx5,
				struct sparx5_tx *tx, int channel)
{ … }

irqreturn_t sparx5_fdma_handler(int irq, void *args)
{ … }

static void sparx5_fdma_injection_mode(struct sparx5 *sparx5)
{ … }

int sparx5_fdma_start(struct sparx5 *sparx5)
{ … }

static u32 sparx5_fdma_port_ctrl(struct sparx5 *sparx5)
{ … }

int sparx5_fdma_stop(struct sparx5 *sparx5)
{ … }