linux/drivers/net/ethernet/mscc/ocelot_qs.h

/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/*
 * Microsemi Ocelot Switch driver
 *
 * Copyright (c) 2017 Microsemi Corporation
 */

#ifndef _MSCC_OCELOT_QS_H_
#define _MSCC_OCELOT_QS_H_

/* TODO handle BE */
#define XTR_EOF_0 …
#define XTR_EOF_1 …
#define XTR_EOF_2 …
#define XTR_EOF_3 …
#define XTR_PRUNED …
#define XTR_ABORT …
#define XTR_ESCAPE …
#define XTR_NOT_READY …
#define XTR_VALID_BYTES(x) …

#define QS_XTR_GRP_CFG_RSZ …

#define QS_XTR_GRP_CFG_MODE(x) …
#define QS_XTR_GRP_CFG_MODE_M …
#define QS_XTR_GRP_CFG_MODE_X(x) …
#define QS_XTR_GRP_CFG_STATUS_WORD_POS …
#define QS_XTR_GRP_CFG_BYTE_SWAP …

#define QS_XTR_RD_RSZ …

#define QS_XTR_FRM_PRUNING_RSZ …

#define QS_XTR_CFG_DP_WM(x) …
#define QS_XTR_CFG_DP_WM_M …
#define QS_XTR_CFG_DP_WM_X(x) …
#define QS_XTR_CFG_SCH_WM(x) …
#define QS_XTR_CFG_SCH_WM_M …
#define QS_XTR_CFG_SCH_WM_X(x) …
#define QS_XTR_CFG_OFLW_ERR_STICKY(x) …
#define QS_XTR_CFG_OFLW_ERR_STICKY_M …

#define QS_INJ_GRP_CFG_RSZ …

#define QS_INJ_GRP_CFG_MODE(x) …
#define QS_INJ_GRP_CFG_MODE_M …
#define QS_INJ_GRP_CFG_MODE_X(x) …
#define QS_INJ_GRP_CFG_BYTE_SWAP …

#define QS_INJ_WR_RSZ …

#define QS_INJ_CTRL_RSZ …

#define QS_INJ_CTRL_GAP_SIZE(x) …
#define QS_INJ_CTRL_GAP_SIZE_M …
#define QS_INJ_CTRL_GAP_SIZE_X(x) …
#define QS_INJ_CTRL_ABORT …
#define QS_INJ_CTRL_EOF …
#define QS_INJ_CTRL_SOF …
#define QS_INJ_CTRL_VLD_BYTES(x) …
#define QS_INJ_CTRL_VLD_BYTES_M …
#define QS_INJ_CTRL_VLD_BYTES_X(x) …

#define QS_INJ_STATUS_WMARK_REACHED(x) …
#define QS_INJ_STATUS_WMARK_REACHED_M …
#define QS_INJ_STATUS_WMARK_REACHED_X(x) …
#define QS_INJ_STATUS_FIFO_RDY(x) …
#define QS_INJ_STATUS_FIFO_RDY_M …
#define QS_INJ_STATUS_FIFO_RDY_X(x) …
#define QS_INJ_STATUS_INJ_IN_PROGRESS(x) …
#define QS_INJ_STATUS_INJ_IN_PROGRESS_M …

#define QS_INJ_ERR_RSZ …

#define QS_INJ_ERR_ABORT_ERR_STICKY …
#define QS_INJ_ERR_WR_ERR_STICKY …

#endif