// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) /* Copyright (C) 2015-2018 Netronome Systems, Inc. */ /* * nfp6000_pcie.c * Authors: Jakub Kicinski <[email protected]> * Jason McMullan <[email protected]> * Rolf Neugebauer <[email protected]> * * Multiplexes the NFP BARs between NFP internal resources and * implements the PCIe specific interface for generic CPP bus access. * * The BARs are managed with refcounts and are allocated/acquired * using target, token and offset/size matching. The generic CPP bus * abstraction builds upon this BAR interface. */ #include <asm/unaligned.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/kref.h> #include <linux/io.h> #include <linux/delay.h> #include <linux/interrupt.h> #include <linux/sort.h> #include <linux/sched.h> #include <linux/types.h> #include <linux/pci.h> #include "nfp_cpp.h" #include "nfp_dev.h" #include "nfp6000/nfp6000.h" #include "nfp6000_pcie.h" #define NFP_PCIE_BAR(_pf) … #define NFP_PCIE_BAR_EXPLICIT_BAR0(_x, _y) … #define NFP_PCIE_BAR_EXPLICIT_BAR0_SignalType(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR0_SignalType_of(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR0_Token(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR0_Token_of(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR0_Address(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR0_Address_of(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR1(_x, _y) … #define NFP_PCIE_BAR_EXPLICIT_BAR1_SignalRef(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR1_SignalRef_of(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR1_DataMaster(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR1_DataMaster_of(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR1_DataRef(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR1_DataRef_of(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR2(_x, _y) … #define NFP_PCIE_BAR_EXPLICIT_BAR2_Target(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR2_Target_of(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR2_Action(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR2_Action_of(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR2_Length(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR2_Length_of(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR2_ByteMask(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR2_ByteMask_of(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR2_SignalMaster(_x) … #define NFP_PCIE_BAR_EXPLICIT_BAR2_SignalMaster_of(_x) … #define NFP_PCIE_BAR_PCIE2CPP_Action_BaseAddress(_x) … #define NFP_PCIE_BAR_PCIE2CPP_Action_BaseAddress_of(_x) … #define NFP_PCIE_BAR_PCIE2CPP_BaseAddress(_x) … #define NFP_PCIE_BAR_PCIE2CPP_BaseAddress_of(_x) … #define NFP_PCIE_BAR_PCIE2CPP_LengthSelect(_x) … #define NFP_PCIE_BAR_PCIE2CPP_LengthSelect_of(_x) … #define NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT … #define NFP_PCIE_BAR_PCIE2CPP_LengthSelect_64BIT … #define NFP_PCIE_BAR_PCIE2CPP_LengthSelect_0BYTE … #define NFP_PCIE_BAR_PCIE2CPP_MapType(_x) … #define NFP_PCIE_BAR_PCIE2CPP_MapType_of(_x) … #define NFP_PCIE_BAR_PCIE2CPP_MapType_FIXED … #define NFP_PCIE_BAR_PCIE2CPP_MapType_BULK … #define NFP_PCIE_BAR_PCIE2CPP_MapType_TARGET … #define NFP_PCIE_BAR_PCIE2CPP_MapType_GENERAL … #define NFP_PCIE_BAR_PCIE2CPP_MapType_EXPLICIT0 … #define NFP_PCIE_BAR_PCIE2CPP_MapType_EXPLICIT1 … #define NFP_PCIE_BAR_PCIE2CPP_MapType_EXPLICIT2 … #define NFP_PCIE_BAR_PCIE2CPP_MapType_EXPLICIT3 … #define NFP_PCIE_BAR_PCIE2CPP_Target_BaseAddress(_x) … #define NFP_PCIE_BAR_PCIE2CPP_Target_BaseAddress_of(_x) … #define NFP_PCIE_BAR_PCIE2CPP_Token_BaseAddress(_x) … #define NFP_PCIE_BAR_PCIE2CPP_Token_BaseAddress_of(_x) … #define NFP_PCIE_EM … #define NFP_PCIE_SRAM … /* Minimal size of the PCIe cfg memory we depend on being mapped, * queue controller and DMA controller don't have to be covered. */ #define NFP_PCI_MIN_MAP_SIZE … #define NFP_PCIE_P2C_FIXED_SIZE(bar) … #define NFP_PCIE_P2C_BULK_SIZE(bar) … #define NFP_PCIE_P2C_GENERAL_TARGET_OFFSET(bar, x) … #define NFP_PCIE_P2C_GENERAL_TOKEN_OFFSET(bar, x) … #define NFP_PCIE_P2C_GENERAL_SIZE(bar) … #define NFP_PCIE_P2C_EXPBAR_OFFSET(bar_index) … /* The number of explicit BARs to reserve. * Minimum is 0, maximum is 4 on the NFP6000. * The NFP3800 can have only one per PF. */ #define NFP_PCIE_EXPLICIT_BARS … struct nfp6000_pcie; struct nfp6000_area_priv; /** * struct nfp_bar - describes BAR configuration and usage * @nfp: backlink to owner * @barcfg: cached contents of BAR config CSR * @base: the BAR's base CPP offset * @mask: mask for the BAR aperture (read only) * @bitsize: bitsize of BAR aperture (read only) * @index: index of the BAR * @refcnt: number of current users * @iomem: mapped IO memory * @resource: iomem resource window */ struct nfp_bar { … }; #define NFP_PCI_BAR_MAX … struct nfp6000_pcie { … }; static u32 nfp_bar_maptype(struct nfp_bar *bar) { … } static resource_size_t nfp_bar_resource_len(struct nfp_bar *bar) { … } static resource_size_t nfp_bar_resource_start(struct nfp_bar *bar) { … } #define TARGET_WIDTH_32 … #define TARGET_WIDTH_64 … static int compute_bar(const struct nfp6000_pcie *nfp, const struct nfp_bar *bar, u32 *bar_config, u64 *bar_base, int tgt, int act, int tok, u64 offset, size_t size, int width) { … } static int nfp6000_bar_write(struct nfp6000_pcie *nfp, struct nfp_bar *bar, u32 newcfg) { … } static int reconfigure_bar(struct nfp6000_pcie *nfp, struct nfp_bar *bar, int tgt, int act, int tok, u64 offset, size_t size, int width) { … } /* Check if BAR can be used with the given parameters. */ static int matching_bar(struct nfp_bar *bar, u32 tgt, u32 act, u32 tok, u64 offset, size_t size, int width) { … } static int find_matching_bar(struct nfp6000_pcie *nfp, u32 tgt, u32 act, u32 tok, u64 offset, size_t size, int width) { … } /* Return EAGAIN if no resource is available */ static int find_unused_bar_noblock(const struct nfp6000_pcie *nfp, int tgt, int act, int tok, u64 offset, size_t size, int width) { … } static int find_unused_bar_and_lock(struct nfp6000_pcie *nfp, int tgt, int act, int tok, u64 offset, size_t size, int width) { … } static void nfp_bar_get(struct nfp6000_pcie *nfp, struct nfp_bar *bar) { … } static void nfp_bar_put(struct nfp6000_pcie *nfp, struct nfp_bar *bar) { … } static int nfp_wait_for_bar(struct nfp6000_pcie *nfp, int *barnum, u32 tgt, u32 act, u32 tok, u64 offset, size_t size, int width) { … } static int nfp_alloc_bar(struct nfp6000_pcie *nfp, u32 tgt, u32 act, u32 tok, u64 offset, size_t size, int width, int nonblocking) { … } static void disable_bars(struct nfp6000_pcie *nfp); static int bar_cmp(const void *aptr, const void *bptr) { … } /* Map all PCI bars and fetch the actual BAR configurations from the * board. We assume that the BAR with the PCIe config block is * already mapped. * * BAR0.0: Reserved for General Mapping (for MSI-X access to PCIe SRAM) * BAR0.1: Reserved for XPB access (for MSI-X access to PCIe PBA) * BAR0.2: -- * BAR0.3: -- * BAR0.4: Reserved for Explicit 0.0-0.3 access * BAR0.5: Reserved for Explicit 1.0-1.3 access * BAR0.6: Reserved for Explicit 2.0-2.3 access * BAR0.7: Reserved for Explicit 3.0-3.3 access * * BAR1.0-BAR1.7: -- * BAR2.0-BAR2.7: -- */ static int enable_bars(struct nfp6000_pcie *nfp, u16 interface) { … } static void disable_bars(struct nfp6000_pcie *nfp) { … } /* * Generic CPP bus access interface. */ struct nfp6000_area_priv { … }; static int nfp6000_area_init(struct nfp_cpp_area *area, u32 dest, unsigned long long address, unsigned long size) { … } static void nfp6000_area_cleanup(struct nfp_cpp_area *area) { … } static void priv_area_get(struct nfp_cpp_area *area) { … } static int priv_area_put(struct nfp_cpp_area *area) { … } static int nfp6000_area_acquire(struct nfp_cpp_area *area) { … } static void nfp6000_area_release(struct nfp_cpp_area *area) { … } static phys_addr_t nfp6000_area_phys(struct nfp_cpp_area *area) { … } static void __iomem *nfp6000_area_iomem(struct nfp_cpp_area *area) { … } static struct resource *nfp6000_area_resource(struct nfp_cpp_area *area) { … } static int nfp6000_area_read(struct nfp_cpp_area *area, void *kernel_vaddr, unsigned long offset, unsigned int length) { … } static int nfp6000_area_write(struct nfp_cpp_area *area, const void *kernel_vaddr, unsigned long offset, unsigned int length) { … } struct nfp6000_explicit_priv { … }; static int nfp6000_explicit_acquire(struct nfp_cpp_explicit *expl) { … } static void nfp6000_explicit_release(struct nfp_cpp_explicit *expl) { … } static int nfp6000_explicit_put(struct nfp_cpp_explicit *expl, const void *buff, size_t len) { … } static int nfp6000_explicit_do(struct nfp_cpp_explicit *expl, const struct nfp_cpp_explicit_command *cmd, u64 address) { … } static int nfp6000_explicit_get(struct nfp_cpp_explicit *expl, void *buff, size_t len) { … } static int nfp6000_init(struct nfp_cpp *cpp) { … } static void nfp6000_free(struct nfp_cpp *cpp) { … } static int nfp6000_read_serial(struct device *dev, u8 *serial) { … } static int nfp6000_get_interface(struct device *dev) { … } static const struct nfp_cpp_operations nfp6000_pcie_ops = …; /** * nfp_cpp_from_nfp6000_pcie() - Build a NFP CPP bus from a NFP6000 PCI device * @pdev: NFP6000 PCI device * @dev_info: NFP ASIC params * * Return: NFP CPP handle */ struct nfp_cpp * nfp_cpp_from_nfp6000_pcie(struct pci_dev *pdev, const struct nfp_dev_info *dev_info) { … }
Codebase Browser
linux