linux/drivers/net/ethernet/netronome/nfp/nfp_net_ctrl.h

/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/* Copyright (C) 2015-2018 Netronome Systems, Inc. */

/* nfp_net_ctrl.h
 * Netronome network device driver: Control BAR layout
 * Authors: Jakub Kicinski <[email protected]>
 *          Jason McMullan <[email protected]>
 *          Rolf Neugebauer <[email protected]>
 *          Brad Petrus <[email protected]>
 */

#ifndef _NFP_NET_CTRL_H_
#define _NFP_NET_CTRL_H_

#include <linux/types.h>

/* 64-bit per app capabilities */
#define NFP_NET_APP_CAP_SP_INDIFF

/* Configuration BAR size.
 *
 * The configuration BAR is 8K in size, but due to
 * THB-350, 32k needs to be reserved.
 */
#define NFP_NET_CFG_BAR_SZ

/* Offset in Freelist buffer where packet starts on RX */
#define NFP_NET_RX_OFFSET

/* LSO parameters
 * %NFP_NET_LSO_MAX_HDR_SZ:	Maximum header size supported for LSO frames
 * %NFP_NET_LSO_MAX_SEGS:	Maximum number of segments LSO frame can produce
 */
#define NFP_NET_LSO_MAX_HDR_SZ
#define NFP_NET_LSO_MAX_SEGS

/* working with metadata vlan api (NFD version >= 2.0) */
#define NFP_NET_META_VLAN_STRIP
#define NFP_NET_META_VLAN_TPID_MASK
#define NFP_NET_META_VLAN_TCI_MASK

/* Prepend field types */
#define NFP_NET_META_FIELD_SIZE
#define NFP_NET_META_HASH
#define NFP_NET_META_MARK
#define NFP_NET_META_VLAN
#define NFP_NET_META_PORTID
#define NFP_NET_META_CSUM
#define NFP_NET_META_CONN_HANDLE
#define NFP_NET_META_RESYNC_INFO
#define NFP_NET_META_IPSEC

#define NFP_META_PORT_ID_CTRL

/* Prepend field sizes */
#define NFP_NET_META_VLAN_SIZE
#define NFP_NET_META_PORTID_SIZE
#define NFP_NET_META_CONN_HANDLE_SIZE
#define NFP_NET_META_IPSEC_SIZE
#define NFP_NET_META_IPSEC_FIELD_SIZE
/* Hash type pre-pended when a RSS hash was computed */
#define NFP_NET_RSS_NONE
#define NFP_NET_RSS_IPV4
#define NFP_NET_RSS_IPV6
#define NFP_NET_RSS_IPV6_EX
#define NFP_NET_RSS_IPV4_TCP
#define NFP_NET_RSS_IPV6_TCP
#define NFP_NET_RSS_IPV6_EX_TCP
#define NFP_NET_RSS_IPV4_UDP
#define NFP_NET_RSS_IPV6_UDP
#define NFP_NET_RSS_IPV6_EX_UDP

/* Ring counts
 * %NFP_NET_TXR_MAX:	     Maximum number of TX rings
 * %NFP_NET_RXR_MAX:	     Maximum number of RX rings
 */
#define NFP_NET_TXR_MAX
#define NFP_NET_RXR_MAX

/* Read/Write config words (0x0000 - 0x002c)
 * %NFP_NET_CFG_CTRL:	     Global control
 * %NFP_NET_CFG_UPDATE:      Indicate which fields are updated
 * %NFP_NET_CFG_TXRS_ENABLE: Bitmask of enabled TX rings
 * %NFP_NET_CFG_RXRS_ENABLE: Bitmask of enabled RX rings
 * %NFP_NET_CFG_MTU:	     Set MTU size
 * %NFP_NET_CFG_FLBUFSZ:     Set freelist buffer size (must be larger than MTU)
 * %NFP_NET_CFG_EXN:	     MSI-X table entry for exceptions
 * %NFP_NET_CFG_LSC:	     MSI-X table entry for link state changes
 * %NFP_NET_CFG_MACADDR:     MAC address
 *
 * TODO:
 * - define Error details in UPDATE
 */
#define NFP_NET_CFG_CTRL
#define NFP_NET_CFG_CTRL_ENABLE
#define NFP_NET_CFG_CTRL_PROMISC
#define NFP_NET_CFG_CTRL_L2BC
#define NFP_NET_CFG_CTRL_L2MC
#define NFP_NET_CFG_CTRL_RXCSUM
#define NFP_NET_CFG_CTRL_TXCSUM
#define NFP_NET_CFG_CTRL_RXVLAN
#define NFP_NET_CFG_CTRL_TXVLAN
#define NFP_NET_CFG_CTRL_SCATTER
#define NFP_NET_CFG_CTRL_GATHER
#define NFP_NET_CFG_CTRL_LSO
#define NFP_NET_CFG_CTRL_CTAG_FILTER
#define NFP_NET_CFG_CTRL_CMSG_DATA
#define NFP_NET_CFG_CTRL_RXQINQ
#define NFP_NET_CFG_CTRL_RXVLAN_V2
#define NFP_NET_CFG_CTRL_RINGCFG
#define NFP_NET_CFG_CTRL_RSS
#define NFP_NET_CFG_CTRL_IRQMOD
#define NFP_NET_CFG_CTRL_MSIXAUTO
#define NFP_NET_CFG_CTRL_TXRWB
#define NFP_NET_CFG_CTRL_VEPA
#define NFP_NET_CFG_CTRL_TXVLAN_V2
#define NFP_NET_CFG_CTRL_VXLAN
#define NFP_NET_CFG_CTRL_NVGRE
#define NFP_NET_CFG_CTRL_BPF
#define NFP_NET_CFG_CTRL_LSO2
#define NFP_NET_CFG_CTRL_RSS2
#define NFP_NET_CFG_CTRL_CSUM_COMPLETE
#define NFP_NET_CFG_CTRL_LIVE_ADDR

#define NFP_NET_CFG_CTRL_LSO_ANY
#define NFP_NET_CFG_CTRL_RSS_ANY
#define NFP_NET_CFG_CTRL_RXCSUM_ANY
#define NFP_NET_CFG_CTRL_CHAIN_META
#define NFP_NET_CFG_CTRL_RXVLAN_ANY
#define NFP_NET_CFG_CTRL_TXVLAN_ANY

#define NFP_NET_CFG_UPDATE
#define NFP_NET_CFG_UPDATE_GEN
#define NFP_NET_CFG_UPDATE_RING
#define NFP_NET_CFG_UPDATE_RSS
#define NFP_NET_CFG_UPDATE_TXRPRIO
#define NFP_NET_CFG_UPDATE_RXRPRIO
#define NFP_NET_CFG_UPDATE_MSIX
#define NFP_NET_CFG_UPDATE_RESET
#define NFP_NET_CFG_UPDATE_IRQMOD
#define NFP_NET_CFG_UPDATE_VXLAN
#define NFP_NET_CFG_UPDATE_BPF
#define NFP_NET_CFG_UPDATE_MACADDR
#define NFP_NET_CFG_UPDATE_MBOX
#define NFP_NET_CFG_UPDATE_VF
#define NFP_NET_CFG_UPDATE_CRYPTO
#define NFP_NET_CFG_UPDATE_ERR
#define NFP_NET_CFG_TXRS_ENABLE
#define NFP_NET_CFG_RXRS_ENABLE
#define NFP_NET_CFG_MTU
#define NFP_NET_CFG_FLBUFSZ
#define NFP_NET_CFG_EXN
#define NFP_NET_CFG_LSC
#define NFP_NET_CFG_MACADDR

/* Read-only words (0x0030 - 0x0050):
 * %NFP_NET_CFG_VERSION:     Firmware version number
 * %NFP_NET_CFG_STS:	     Status
 * %NFP_NET_CFG_CAP:	     Capabilities (same bits as %NFP_NET_CFG_CTRL)
 * %NFP_NET_CFG_MAX_TXRINGS: Maximum number of TX rings
 * %NFP_NET_CFG_MAX_RXRINGS: Maximum number of RX rings
 * %NFP_NET_CFG_MAX_MTU:     Maximum support MTU
 * %NFP_NET_CFG_START_TXQ:   Start Queue Control Queue to use for TX (PF only)
 * %NFP_NET_CFG_START_RXQ:   Start Queue Control Queue to use for RX (PF only)
 *
 * TODO:
 * - define more STS bits
 */
#define NFP_NET_CFG_VERSION
#define NFP_NET_CFG_VERSION_RESERVED_MASK
#define NFP_NET_CFG_VERSION_DP_NFD3
#define NFP_NET_CFG_VERSION_DP_NFDK
#define NFP_NET_CFG_VERSION_DP_MASK
#define NFP_NET_CFG_VERSION_CLASS_MASK
#define NFP_NET_CFG_VERSION_CLASS(x)
#define NFP_NET_CFG_VERSION_CLASS_GENERIC
#define NFP_NET_CFG_VERSION_MAJOR_MASK
#define NFP_NET_CFG_VERSION_MAJOR(x)
#define NFP_NET_CFG_VERSION_MINOR_MASK
#define NFP_NET_CFG_VERSION_MINOR(x)
#define NFP_NET_CFG_STS
#define NFP_NET_CFG_STS_LINK
/* Link rate */
#define NFP_NET_CFG_STS_LINK_RATE_SHIFT
#define NFP_NET_CFG_STS_LINK_RATE_MASK
#define NFP_NET_CFG_STS_LINK_RATE
#define NFP_NET_CFG_STS_LINK_RATE_UNSUPPORTED
#define NFP_NET_CFG_STS_LINK_RATE_UNKNOWN
#define NFP_NET_CFG_STS_LINK_RATE_1G
#define NFP_NET_CFG_STS_LINK_RATE_10G
#define NFP_NET_CFG_STS_LINK_RATE_25G
#define NFP_NET_CFG_STS_LINK_RATE_40G
#define NFP_NET_CFG_STS_LINK_RATE_50G
#define NFP_NET_CFG_STS_LINK_RATE_100G
/* NSP Link rate is a 16-bit word. It's determined by NSP and
 * written to CFG BAR by NFP driver.
 */
#define NFP_NET_CFG_STS_NSP_LINK_RATE
#define NFP_NET_CFG_CAP
#define NFP_NET_CFG_MAX_TXRINGS
#define NFP_NET_CFG_MAX_RXRINGS
#define NFP_NET_CFG_MAX_MTU
/* Next two words are being used by VFs for solving THB350 issue */
#define NFP_NET_CFG_START_TXQ
#define NFP_NET_CFG_START_RXQ

/* Prepend configuration
 */
#define NFP_NET_CFG_RX_OFFSET
#define NFP_NET_CFG_RX_OFFSET_DYNAMIC

/* RSS capabilities
 * %NFP_NET_CFG_RSS_CAP_HFUNC:	supported hash functions (same bits as
 *				%NFP_NET_CFG_RSS_HFUNC)
 */
#define NFP_NET_CFG_RSS_CAP
#define NFP_NET_CFG_RSS_CAP_HFUNC

/* TLV area start
 * %NFP_NET_CFG_TLV_BASE:	start anchor of the TLV area
 */
#define NFP_NET_CFG_TLV_BASE

/* VXLAN/UDP encap configuration
 * %NFP_NET_CFG_VXLAN_PORT:	Base address of table of tunnels' UDP dst ports
 * %NFP_NET_CFG_VXLAN_SZ:	Size of the UDP port table in bytes
 */
#define NFP_NET_CFG_VXLAN_PORT
#define NFP_NET_CFG_VXLAN_SZ

/* BPF section
 * %NFP_NET_CFG_BPF_ABI:	BPF ABI version
 * %NFP_NET_CFG_BPF_CAP:	BPF capabilities
 * %NFP_NET_CFG_BPF_MAX_LEN:	Maximum size of JITed BPF code in bytes
 * %NFP_NET_CFG_BPF_START:	Offset at which BPF will be loaded
 * %NFP_NET_CFG_BPF_DONE:	Offset to jump to on exit
 * %NFP_NET_CFG_BPF_STACK_SZ:	Total size of stack area in 64B chunks
 * %NFP_NET_CFG_BPF_INL_MTU:	Packet data split offset in 64B chunks
 * %NFP_NET_CFG_BPF_SIZE:	Size of the JITed BPF code in instructions
 * %NFP_NET_CFG_BPF_ADDR:	DMA address of the buffer with JITed BPF code
 */
#define NFP_NET_CFG_BPF_ABI
#define NFP_NET_CFG_BPF_CAP
#define NFP_NET_BPF_CAP_RELO
#define NFP_NET_CFG_BPF_MAX_LEN
#define NFP_NET_CFG_BPF_START
#define NFP_NET_CFG_BPF_DONE
#define NFP_NET_CFG_BPF_STACK_SZ
#define NFP_NET_CFG_BPF_INL_MTU
#define NFP_NET_CFG_BPF_SIZE
#define NFP_NET_CFG_BPF_ADDR
#define NFP_NET_CFG_BPF_CFG_8CTX
#define NFP_NET_CFG_BPF_CFG_MASK
#define NFP_NET_CFG_BPF_ADDR_MASK

/* 3 words reserved for extended ctrl words (0x0098 - 0x00a4)
 * 3 words reserved for extended cap words (0x00a4 - 0x00b0)
 * Currently only one word is used, can be extended in future.
 */
#define NFP_NET_CFG_CTRL_WORD1
#define NFP_NET_CFG_CTRL_PKT_TYPE
#define NFP_NET_CFG_CTRL_IPSEC
#define NFP_NET_CFG_CTRL_MCAST_FILTER
#define NFP_NET_CFG_CTRL_FREELIST_EN
#define NFP_NET_CFG_CTRL_FLOW_STEER
#define NFP_NET_CFG_CTRL_USO

#define NFP_NET_CFG_CAP_WORD1

/* 16B reserved for future use (0x00b0 - 0x00c0) */
#define NFP_NET_CFG_RESERVED
#define NFP_NET_CFG_RESERVED_SZ

/* RSS configuration (0x0100 - 0x01ac):
 * Used only when NFP_NET_CFG_CTRL_RSS is enabled
 * %NFP_NET_CFG_RSS_CFG:     RSS configuration word
 * %NFP_NET_CFG_RSS_KEY:     RSS "secret" key
 * %NFP_NET_CFG_RSS_ITBL:    RSS indirection table
 */
#define NFP_NET_CFG_RSS_BASE
#define NFP_NET_CFG_RSS_CTRL
#define NFP_NET_CFG_RSS_MASK
#define NFP_NET_CFG_RSS_MASK_of(_x)
#define NFP_NET_CFG_RSS_IPV4
#define NFP_NET_CFG_RSS_IPV6
#define NFP_NET_CFG_RSS_IPV4_TCP
#define NFP_NET_CFG_RSS_IPV4_UDP
#define NFP_NET_CFG_RSS_IPV6_TCP
#define NFP_NET_CFG_RSS_IPV6_UDP
#define NFP_NET_CFG_RSS_HFUNC
#define NFP_NET_CFG_RSS_TOEPLITZ
#define NFP_NET_CFG_RSS_XOR
#define NFP_NET_CFG_RSS_CRC32
#define NFP_NET_CFG_RSS_HFUNCS
#define NFP_NET_CFG_RSS_KEY
#define NFP_NET_CFG_RSS_KEY_SZ
#define NFP_NET_CFG_RSS_ITBL
#define NFP_NET_CFG_RSS_ITBL_SZ

/* TX ring configuration (0x200 - 0x800)
 * %NFP_NET_CFG_TXR_BASE:    Base offset for TX ring configuration
 * %NFP_NET_CFG_TXR_ADDR:    Per TX ring DMA address (8B entries)
 * %NFP_NET_CFG_TXR_WB_ADDR: Per TX ring write back DMA address (8B entries)
 * %NFP_NET_CFG_TXR_SZ:      Per TX ring ring size (1B entries)
 * %NFP_NET_CFG_TXR_VEC:     Per TX ring MSI-X table entry (1B entries)
 * %NFP_NET_CFG_TXR_PRIO:    Per TX ring priority (1B entries)
 * %NFP_NET_CFG_TXR_IRQ_MOD: Per TX ring interrupt moderation packet
 */
#define NFP_NET_CFG_TXR_BASE
#define NFP_NET_CFG_TXR_ADDR(_x)
#define NFP_NET_CFG_TXR_WB_ADDR(_x)
#define NFP_NET_CFG_TXR_SZ(_x)
#define NFP_NET_CFG_TXR_VEC(_x)
#define NFP_NET_CFG_TXR_PRIO(_x)
#define NFP_NET_CFG_TXR_IRQ_MOD(_x)

/* RX ring configuration (0x0800 - 0x0c00)
 * %NFP_NET_CFG_RXR_BASE:    Base offset for RX ring configuration
 * %NFP_NET_CFG_RXR_ADDR:    Per RX ring DMA address (8B entries)
 * %NFP_NET_CFG_RXR_SZ:      Per RX ring ring size (1B entries)
 * %NFP_NET_CFG_RXR_VEC:     Per RX ring MSI-X table entry (1B entries)
 * %NFP_NET_CFG_RXR_PRIO:    Per RX ring priority (1B entries)
 * %NFP_NET_CFG_RXR_IRQ_MOD: Per RX ring interrupt moderation (4B entries)
 */
#define NFP_NET_CFG_RXR_BASE
#define NFP_NET_CFG_RXR_ADDR(_x)
#define NFP_NET_CFG_RXR_SZ(_x)
#define NFP_NET_CFG_RXR_VEC(_x)
#define NFP_NET_CFG_RXR_PRIO(_x)
#define NFP_NET_CFG_RXR_IRQ_MOD(_x)

/* Interrupt Control/Cause registers (0x0c00 - 0x0d00)
 * These registers are only used when MSI-X auto-masking is not
 * enabled (%NFP_NET_CFG_CTRL_MSIXAUTO not set).  The array is index
 * by MSI-X entry and are 1B in size.  If an entry is zero, the
 * corresponding entry is enabled.  If the FW generates an interrupt,
 * it writes a cause into the corresponding field.  This also masks
 * the MSI-X entry and the host driver must clear the register to
 * re-enable the interrupt.
 */
#define NFP_NET_CFG_ICR_BASE
#define NFP_NET_CFG_ICR(_x)
#define NFP_NET_CFG_ICR_UNMASKED
#define NFP_NET_CFG_ICR_RXTX
#define NFP_NET_CFG_ICR_LSC

/* General device stats (0x0d00 - 0x0d90)
 * all counters are 64bit.
 */
#define NFP_NET_CFG_STATS_BASE
#define NFP_NET_CFG_STATS_RX_DISCARDS
#define NFP_NET_CFG_STATS_RX_ERRORS
#define NFP_NET_CFG_STATS_RX_OCTETS
#define NFP_NET_CFG_STATS_RX_UC_OCTETS
#define NFP_NET_CFG_STATS_RX_MC_OCTETS
#define NFP_NET_CFG_STATS_RX_BC_OCTETS
#define NFP_NET_CFG_STATS_RX_FRAMES
#define NFP_NET_CFG_STATS_RX_MC_FRAMES
#define NFP_NET_CFG_STATS_RX_BC_FRAMES

#define NFP_NET_CFG_STATS_TX_DISCARDS
#define NFP_NET_CFG_STATS_TX_ERRORS
#define NFP_NET_CFG_STATS_TX_OCTETS
#define NFP_NET_CFG_STATS_TX_UC_OCTETS
#define NFP_NET_CFG_STATS_TX_MC_OCTETS
#define NFP_NET_CFG_STATS_TX_BC_OCTETS
#define NFP_NET_CFG_STATS_TX_FRAMES
#define NFP_NET_CFG_STATS_TX_MC_FRAMES
#define NFP_NET_CFG_STATS_TX_BC_FRAMES

#define NFP_NET_CFG_STATS_APP0_FRAMES
#define NFP_NET_CFG_STATS_APP0_BYTES
#define NFP_NET_CFG_STATS_APP1_FRAMES
#define NFP_NET_CFG_STATS_APP1_BYTES
#define NFP_NET_CFG_STATS_APP2_FRAMES
#define NFP_NET_CFG_STATS_APP2_BYTES
#define NFP_NET_CFG_STATS_APP3_FRAMES
#define NFP_NET_CFG_STATS_APP3_BYTES

/* Per ring stats (0x1000 - 0x1800)
 * options, 64bit per entry
 * %NFP_NET_CFG_TXR_STATS:   TX ring statistics (Packet and Byte count)
 * %NFP_NET_CFG_RXR_STATS:   RX ring statistics (Packet and Byte count)
 */
#define NFP_NET_CFG_TXR_STATS_BASE
#define NFP_NET_CFG_TXR_STATS(_x)
#define NFP_NET_CFG_RXR_STATS_BASE
#define NFP_NET_CFG_RXR_STATS(_x)

/* General use mailbox area (0x1800 - 0x19ff)
 * 4B used for update command and 4B return code
 * followed by a max of 504B of variable length value
 */
#define NFP_NET_CFG_MBOX_BASE
#define NFP_NET_CFG_MBOX_VAL_MAX_SZ
#define NFP_NET_CFG_MBOX_SIMPLE_CMD
#define NFP_NET_CFG_MBOX_SIMPLE_RET
#define NFP_NET_CFG_MBOX_SIMPLE_VAL

#define NFP_NET_CFG_MBOX_CMD_CTAG_FILTER_ADD
#define NFP_NET_CFG_MBOX_CMD_CTAG_FILTER_KILL
#define NFP_NET_CFG_MBOX_CMD_IPSEC
#define NFP_NET_CFG_MBOX_CMD_PCI_DSCP_PRIOMAP_SET
#define NFP_NET_CFG_MBOX_CMD_TLV_CMSG
#define NFP_NET_CFG_MBOX_CMD_DCB_UPDATE

#define NFP_NET_CFG_MBOX_CMD_MULTICAST_ADD
#define NFP_NET_CFG_MBOX_CMD_MULTICAST_DEL

#define NFP_NET_CFG_MBOX_CMD_FLOW_STEER

/* VLAN filtering using general use mailbox
 * %NFP_NET_CFG_VLAN_FILTER:		Base address of VLAN filter mailbox
 * %NFP_NET_CFG_VLAN_FILTER_VID:	VLAN ID to filter
 * %NFP_NET_CFG_VLAN_FILTER_PROTO:	VLAN proto to filter
 * %NFP_NET_CFG_VXLAN_SZ:		Size of the VLAN filter mailbox in bytes
 */
#define NFP_NET_CFG_VLAN_FILTER
#define NFP_NET_CFG_VLAN_FILTER_VID
#define NFP_NET_CFG_VLAN_FILTER_PROTO
#define NFP_NET_CFG_VLAN_FILTER_SZ

/* Multicast filtering using general use mailbox
 * %NFP_NET_CFG_MULTICAST:		Base address of Multicast filter mailbox
 * %NFP_NET_CFG_MULTICAST_MAC_HI:	High 32-bits of Multicast MAC address
 * %NFP_NET_CFG_MULTICAST_MAC_LO:	Low 16-bits of Multicast MAC address
 * %NFP_NET_CFG_MULTICAST_SZ:		Size of the Multicast filter mailbox in bytes
 */
#define NFP_NET_CFG_MULTICAST
#define NFP_NET_CFG_MULTICAST_MAC_HI
#define NFP_NET_CFG_MULTICAST_MAC_LO
#define NFP_NET_CFG_MULTICAST_SZ

/* Max size of FS rules in bytes */
#define NFP_NET_CFG_FS_SZ
/* Sub commands for FS */
enum {};

/* TLV capabilities
 * %NFP_NET_CFG_TLV_TYPE:	Offset of type within the TLV
 * %NFP_NET_CFG_TLV_TYPE_REQUIRED: Driver must be able to parse the TLV
 * %NFP_NET_CFG_TLV_LENGTH:	Offset of length within the TLV
 * %NFP_NET_CFG_TLV_LENGTH_INC: TLV length increments
 * %NFP_NET_CFG_TLV_VALUE:	Offset of value with the TLV
 *
 * List of simple TLV structures, first one starts at %NFP_NET_CFG_TLV_BASE.
 * Last structure must be of type %NFP_NET_CFG_TLV_TYPE_END.  Presence of TLVs
 * is indicated by %NFP_NET_CFG_TLV_BASE being non-zero.  TLV structures may
 * fill the entire remainder of the BAR or be shorter.  FW must make sure TLVs
 * don't conflict with other features which allocate space beyond
 * %NFP_NET_CFG_TLV_BASE.  %NFP_NET_CFG_TLV_TYPE_RESERVED should be used to wrap
 * space used by such features.
 * Note that the 4 byte TLV header is not counted in %NFP_NET_CFG_TLV_LENGTH.
 */
#define NFP_NET_CFG_TLV_TYPE
#define NFP_NET_CFG_TLV_TYPE_REQUIRED
#define NFP_NET_CFG_TLV_LENGTH
#define NFP_NET_CFG_TLV_LENGTH_INC
#define NFP_NET_CFG_TLV_VALUE

#define NFP_NET_CFG_TLV_HEADER_REQUIRED
#define NFP_NET_CFG_TLV_HEADER_TYPE
#define NFP_NET_CFG_TLV_HEADER_LENGTH

/* Capability TLV types
 *
 * %NFP_NET_CFG_TLV_TYPE_UNKNOWN:
 * Special TLV type to catch bugs, should never be encountered.  Drivers should
 * treat encountering this type as error and refuse to probe.
 *
 * %NFP_NET_CFG_TLV_TYPE_RESERVED:
 * Reserved space, may contain legacy fixed-offset fields, or be used for
 * padding.  The use of this type should be otherwise avoided.
 *
 * %NFP_NET_CFG_TLV_TYPE_END:
 * Empty, end of TLV list.  Must be the last TLV.  Drivers will stop processing
 * further TLVs when encountered.
 *
 * %NFP_NET_CFG_TLV_TYPE_ME_FREQ:
 * Single word, ME frequency in MHz as used in calculation for
 * %NFP_NET_CFG_RXR_IRQ_MOD and %NFP_NET_CFG_TXR_IRQ_MOD.
 *
 * %NFP_NET_CFG_TLV_TYPE_MBOX:
 * Variable, mailbox area.  Overwrites the default location which is
 * %NFP_NET_CFG_MBOX_BASE and length %NFP_NET_CFG_MBOX_VAL_MAX_SZ.
 *
 * %NFP_NET_CFG_TLV_TYPE_EXPERIMENTAL0:
 * %NFP_NET_CFG_TLV_TYPE_EXPERIMENTAL1:
 * Variable, experimental IDs.  IDs designated for internal development and
 * experiments before a stable TLV ID has been allocated to a feature.  Should
 * never be present in production firmware.
 *
 * %NFP_NET_CFG_TLV_TYPE_REPR_CAP:
 * Single word, equivalent of %NFP_NET_CFG_CAP for representors, features which
 * can be used on representors.
 *
 * %NFP_NET_CFG_TLV_TYPE_MBOX_CMSG_TYPES:
 * Variable, bitmap of control message types supported by the mailbox handler.
 * Bit 0 corresponds to message type 0, bit 1 to 1, etc.  Control messages are
 * encapsulated into simple TLVs, with an end TLV and written to the Mailbox.
 *
 * %NFP_NET_CFG_TLV_TYPE_CRYPTO_OPS:
 * 8 words, bitmaps of supported and enabled crypto operations.
 * First 16B (4 words) contains a bitmap of supported crypto operations,
 * and next 16B contain the enabled operations.
 * This capability is made obsolete by ones with better sync methods.
 *
 * %NFP_NET_CFG_TLV_TYPE_VNIC_STATS:
 * Variable, per-vNIC statistics, data should be 8B aligned (FW should insert
 * zero-length RESERVED TLV to pad).
 * TLV data has two sections.  First is an array of statistics' IDs (2B each).
 * Second 8B statistics themselves.  Statistics are 8B aligned, meaning there
 * may be a padding between sections.
 * Number of statistics can be determined as floor(tlv.length / (2 + 8)).
 * This TLV overwrites %NFP_NET_CFG_STATS_* values (statistics in this TLV
 * duplicate the old ones, so driver should be careful not to unnecessarily
 * render both).
 *
 * %NFP_NET_CFG_TLV_TYPE_CRYPTO_OPS_RX_SCAN:
 * Same as %NFP_NET_CFG_TLV_TYPE_CRYPTO_OPS, but crypto TLS does stream scan
 * RX sync, rather than kernel-assisted sync.
 */
#define NFP_NET_CFG_TLV_TYPE_UNKNOWN
#define NFP_NET_CFG_TLV_TYPE_RESERVED
#define NFP_NET_CFG_TLV_TYPE_END
#define NFP_NET_CFG_TLV_TYPE_ME_FREQ
#define NFP_NET_CFG_TLV_TYPE_MBOX
#define NFP_NET_CFG_TLV_TYPE_EXPERIMENTAL0
#define NFP_NET_CFG_TLV_TYPE_EXPERIMENTAL1
#define NFP_NET_CFG_TLV_TYPE_REPR_CAP
#define NFP_NET_CFG_TLV_TYPE_MBOX_CMSG_TYPES
#define NFP_NET_CFG_TLV_TYPE_CRYPTO_OPS
#define NFP_NET_CFG_TLV_TYPE_VNIC_STATS
#define NFP_NET_CFG_TLV_TYPE_CRYPTO_OPS_RX_SCAN

struct device;

/* struct nfp_net_tlv_caps - parsed control BAR TLV capabilities
 * @me_freq_mhz:	ME clock_freq (MHz)
 * @mbox_off:		vNIC mailbox area offset
 * @mbox_len:		vNIC mailbox area length
 * @repr_cap:		capabilities for representors
 * @mbox_cmsg_types:	cmsgs which can be passed through the mailbox
 * @crypto_ops:		supported crypto operations
 * @crypto_enable_off:	offset of crypto ops enable region
 * @vnic_stats_off:	offset of vNIC stats area
 * @vnic_stats_cnt:	number of vNIC stats
 * @tls_resync_ss:	TLS resync will be performed via stream scan
 */
struct nfp_net_tlv_caps {};

int nfp_net_tlv_caps_parse(struct device *dev, u8 __iomem *ctrl_mem,
			   struct nfp_net_tlv_caps *caps);
#endif /* _NFP_NET_CTRL_H_ */