// SPDX-License-Identifier: GPL-2.0 /* Copyright (c) 2016-2017, National Instruments Corp. * * Author: Moritz Fischer <[email protected]> */ #include <linux/etherdevice.h> #include <linux/module.h> #include <linux/netdevice.h> #include <linux/of.h> #include <linux/of_mdio.h> #include <linux/of_net.h> #include <linux/platform_device.h> #include <linux/skbuff.h> #include <linux/phy.h> #include <linux/mii.h> #include <linux/nvmem-consumer.h> #include <linux/ethtool.h> #include <linux/iopoll.h> #define TX_BD_NUM … #define RX_BD_NUM … /* Axi DMA Register definitions */ #define XAXIDMA_TX_CR_OFFSET … #define XAXIDMA_TX_SR_OFFSET … #define XAXIDMA_TX_CDESC_OFFSET … #define XAXIDMA_TX_TDESC_OFFSET … #define XAXIDMA_RX_CR_OFFSET … #define XAXIDMA_RX_SR_OFFSET … #define XAXIDMA_RX_CDESC_OFFSET … #define XAXIDMA_RX_TDESC_OFFSET … #define XAXIDMA_CR_RUNSTOP_MASK … #define XAXIDMA_CR_RESET_MASK … #define XAXIDMA_BD_CTRL_LENGTH_MASK … #define XAXIDMA_BD_CTRL_TXSOF_MASK … #define XAXIDMA_BD_CTRL_TXEOF_MASK … #define XAXIDMA_BD_CTRL_ALL_MASK … #define XAXIDMA_DELAY_MASK … #define XAXIDMA_COALESCE_MASK … #define XAXIDMA_DELAY_SHIFT … #define XAXIDMA_COALESCE_SHIFT … #define XAXIDMA_IRQ_IOC_MASK … #define XAXIDMA_IRQ_DELAY_MASK … #define XAXIDMA_IRQ_ERROR_MASK … #define XAXIDMA_IRQ_ALL_MASK … /* Default TX/RX Threshold and waitbound values for SGDMA mode */ #define XAXIDMA_DFT_TX_THRESHOLD … #define XAXIDMA_DFT_TX_WAITBOUND … #define XAXIDMA_DFT_RX_THRESHOLD … #define XAXIDMA_DFT_RX_WAITBOUND … #define XAXIDMA_BD_STS_ACTUAL_LEN_MASK … #define XAXIDMA_BD_STS_COMPLETE_MASK … #define XAXIDMA_BD_STS_DEC_ERR_MASK … #define XAXIDMA_BD_STS_SLV_ERR_MASK … #define XAXIDMA_BD_STS_INT_ERR_MASK … #define XAXIDMA_BD_STS_ALL_ERR_MASK … #define XAXIDMA_BD_STS_RXSOF_MASK … #define XAXIDMA_BD_STS_RXEOF_MASK … #define XAXIDMA_BD_STS_ALL_MASK … #define NIXGE_REG_CTRL_OFFSET … #define NIXGE_REG_INFO … #define NIXGE_REG_MAC_CTL … #define NIXGE_REG_PHY_CTL … #define NIXGE_REG_LED_CTL … #define NIXGE_REG_MDIO_DATA … #define NIXGE_REG_MDIO_ADDR … #define NIXGE_REG_MDIO_OP … #define NIXGE_REG_MDIO_CTRL … #define NIXGE_ID_LED_CTL_EN … #define NIXGE_ID_LED_CTL_VAL … #define NIXGE_MDIO_CLAUSE45 … #define NIXGE_MDIO_CLAUSE22 … #define NIXGE_MDIO_OP(n) … #define NIXGE_MDIO_OP_ADDRESS … #define NIXGE_MDIO_C45_WRITE … #define NIXGE_MDIO_C45_READ … #define NIXGE_MDIO_C22_WRITE … #define NIXGE_MDIO_C22_READ … #define NIXGE_MDIO_ADDR(n) … #define NIXGE_MDIO_MMD(n) … #define NIXGE_REG_MAC_LSB … #define NIXGE_REG_MAC_MSB … /* Packet size info */ #define NIXGE_HDR_SIZE … #define NIXGE_TRL_SIZE … #define NIXGE_MTU … #define NIXGE_JUMBO_MTU … #define NIXGE_MAX_FRAME_SIZE … #define NIXGE_MAX_JUMBO_FRAME_SIZE … enum nixge_version { … }; struct nixge_hw_dma_bd { … }; #ifdef CONFIG_PHYS_ADDR_T_64BIT #define nixge_hw_dma_bd_set_addr(bd, field, addr) … #else #define nixge_hw_dma_bd_set_addr … #endif #define nixge_hw_dma_bd_set_phys(bd, addr) … #define nixge_hw_dma_bd_set_next(bd, addr) … #define nixge_hw_dma_bd_set_offset(bd, addr) … #ifdef CONFIG_PHYS_ADDR_T_64BIT #define nixge_hw_dma_bd_get_addr(bd, field) … #else #define nixge_hw_dma_bd_get_addr … #endif struct nixge_tx_skb { … }; struct nixge_priv { … }; static void nixge_dma_write_reg(struct nixge_priv *priv, off_t offset, u32 val) { … } static void nixge_dma_write_desc_reg(struct nixge_priv *priv, off_t offset, dma_addr_t addr) { … } static u32 nixge_dma_read_reg(const struct nixge_priv *priv, off_t offset) { … } static void nixge_ctrl_write_reg(struct nixge_priv *priv, off_t offset, u32 val) { … } static u32 nixge_ctrl_read_reg(struct nixge_priv *priv, off_t offset) { … } #define nixge_ctrl_poll_timeout(priv, addr, val, cond, sleep_us, timeout_us) … #define nixge_dma_poll_timeout(priv, addr, val, cond, sleep_us, timeout_us) … static void nixge_hw_dma_bd_release(struct net_device *ndev) { … } static int nixge_hw_dma_bd_init(struct net_device *ndev) { … } static void __nixge_device_reset(struct nixge_priv *priv, off_t offset) { … } static void nixge_device_reset(struct net_device *ndev) { … } static void nixge_handle_link_change(struct net_device *ndev) { … } static void nixge_tx_skb_unmap(struct nixge_priv *priv, struct nixge_tx_skb *tx_skb) { … } static void nixge_start_xmit_done(struct net_device *ndev) { … } static int nixge_check_tx_bd_space(struct nixge_priv *priv, int num_frag) { … } static netdev_tx_t nixge_start_xmit(struct sk_buff *skb, struct net_device *ndev) { … } static int nixge_recv(struct net_device *ndev, int budget) { … } static int nixge_poll(struct napi_struct *napi, int budget) { … } static irqreturn_t nixge_tx_irq(int irq, void *_ndev) { … } static irqreturn_t nixge_rx_irq(int irq, void *_ndev) { … } static void nixge_dma_err_handler(struct tasklet_struct *t) { … } static int nixge_open(struct net_device *ndev) { … } static int nixge_stop(struct net_device *ndev) { … } static int nixge_change_mtu(struct net_device *ndev, int new_mtu) { … } static s32 __nixge_hw_set_mac_address(struct net_device *ndev) { … } static int nixge_net_set_mac_address(struct net_device *ndev, void *p) { … } static const struct net_device_ops nixge_netdev_ops = …; static void nixge_ethtools_get_drvinfo(struct net_device *ndev, struct ethtool_drvinfo *ed) { … } static int nixge_ethtools_get_coalesce(struct net_device *ndev, struct ethtool_coalesce *ecoalesce, struct kernel_ethtool_coalesce *kernel_coal, struct netlink_ext_ack *extack) { … } static int nixge_ethtools_set_coalesce(struct net_device *ndev, struct ethtool_coalesce *ecoalesce, struct kernel_ethtool_coalesce *kernel_coal, struct netlink_ext_ack *extack) { … } static int nixge_ethtools_set_phys_id(struct net_device *ndev, enum ethtool_phys_id_state state) { … } static const struct ethtool_ops nixge_ethtool_ops = …; static int nixge_mdio_read_c22(struct mii_bus *bus, int phy_id, int reg) { … } static int nixge_mdio_read_c45(struct mii_bus *bus, int phy_id, int device, int reg) { … } static int nixge_mdio_write_c22(struct mii_bus *bus, int phy_id, int reg, u16 val) { … } static int nixge_mdio_write_c45(struct mii_bus *bus, int phy_id, int device, int reg, u16 val) { … } static int nixge_mdio_setup(struct nixge_priv *priv, struct device_node *np) { … } static void *nixge_get_nvmem_address(struct device *dev) { … } /* Match table for of_platform binding */ static const struct of_device_id nixge_dt_ids[] = …; MODULE_DEVICE_TABLE(of, nixge_dt_ids); static int nixge_of_get_resources(struct platform_device *pdev) { … } static int nixge_probe(struct platform_device *pdev) { … } static void nixge_remove(struct platform_device *pdev) { … } static struct platform_driver nixge_driver = …; module_platform_driver(…) …; MODULE_LICENSE(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …;
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