// SPDX-License-Identifier: GPL-2.0-or-later /* * drivers/net/ethernet/nxp/lpc_eth.c * * Author: Kevin Wells <[email protected]> * * Copyright (C) 2010 NXP Semiconductors * Copyright (C) 2012 Roland Stigge <[email protected]> */ #define pr_fmt(fmt) … #include <linux/clk.h> #include <linux/crc32.h> #include <linux/etherdevice.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_mdio.h> #include <linux/of_net.h> #include <linux/phy.h> #include <linux/platform_device.h> #include <linux/spinlock.h> #include <linux/soc/nxp/lpc32xx-misc.h> #define MODNAME … #define DRV_VERSION … #define ENET_MAXF_SIZE … #define ENET_RX_DESC … #define ENET_TX_DESC … #define NAPI_WEIGHT … /* * Ethernet MAC controller Register offsets */ #define LPC_ENET_MAC1(x) … #define LPC_ENET_MAC2(x) … #define LPC_ENET_IPGT(x) … #define LPC_ENET_IPGR(x) … #define LPC_ENET_CLRT(x) … #define LPC_ENET_MAXF(x) … #define LPC_ENET_SUPP(x) … #define LPC_ENET_TEST(x) … #define LPC_ENET_MCFG(x) … #define LPC_ENET_MCMD(x) … #define LPC_ENET_MADR(x) … #define LPC_ENET_MWTD(x) … #define LPC_ENET_MRDD(x) … #define LPC_ENET_MIND(x) … #define LPC_ENET_SA0(x) … #define LPC_ENET_SA1(x) … #define LPC_ENET_SA2(x) … #define LPC_ENET_COMMAND(x) … #define LPC_ENET_STATUS(x) … #define LPC_ENET_RXDESCRIPTOR(x) … #define LPC_ENET_RXSTATUS(x) … #define LPC_ENET_RXDESCRIPTORNUMBER(x) … #define LPC_ENET_RXPRODUCEINDEX(x) … #define LPC_ENET_RXCONSUMEINDEX(x) … #define LPC_ENET_TXDESCRIPTOR(x) … #define LPC_ENET_TXSTATUS(x) … #define LPC_ENET_TXDESCRIPTORNUMBER(x) … #define LPC_ENET_TXPRODUCEINDEX(x) … #define LPC_ENET_TXCONSUMEINDEX(x) … #define LPC_ENET_TSV0(x) … #define LPC_ENET_TSV1(x) … #define LPC_ENET_RSV(x) … #define LPC_ENET_FLOWCONTROLCOUNTER(x) … #define LPC_ENET_FLOWCONTROLSTATUS(x) … #define LPC_ENET_RXFILTER_CTRL(x) … #define LPC_ENET_RXFILTERWOLSTATUS(x) … #define LPC_ENET_RXFILTERWOLCLEAR(x) … #define LPC_ENET_HASHFILTERL(x) … #define LPC_ENET_HASHFILTERH(x) … #define LPC_ENET_INTSTATUS(x) … #define LPC_ENET_INTENABLE(x) … #define LPC_ENET_INTCLEAR(x) … #define LPC_ENET_INTSET(x) … #define LPC_ENET_POWERDOWN(x) … /* * mac1 register definitions */ #define LPC_MAC1_RECV_ENABLE … #define LPC_MAC1_PASS_ALL_RX_FRAMES … #define LPC_MAC1_RX_FLOW_CONTROL … #define LPC_MAC1_TX_FLOW_CONTROL … #define LPC_MAC1_LOOPBACK … #define LPC_MAC1_RESET_TX … #define LPC_MAC1_RESET_MCS_TX … #define LPC_MAC1_RESET_RX … #define LPC_MAC1_RESET_MCS_RX … #define LPC_MAC1_SIMULATION_RESET … #define LPC_MAC1_SOFT_RESET … /* * mac2 register definitions */ #define LPC_MAC2_FULL_DUPLEX … #define LPC_MAC2_FRAME_LENGTH_CHECKING … #define LPC_MAC2_HUGH_LENGTH_CHECKING … #define LPC_MAC2_DELAYED_CRC … #define LPC_MAC2_CRC_ENABLE … #define LPC_MAC2_PAD_CRC_ENABLE … #define LPC_MAC2_VLAN_PAD_ENABLE … #define LPC_MAC2_AUTO_DETECT_PAD_ENABLE … #define LPC_MAC2_PURE_PREAMBLE_ENFORCEMENT … #define LPC_MAC2_LONG_PREAMBLE_ENFORCEMENT … #define LPC_MAC2_NO_BACKOFF … #define LPC_MAC2_BACK_PRESSURE … #define LPC_MAC2_EXCESS_DEFER … /* * ipgt register definitions */ #define LPC_IPGT_LOAD(n) … /* * ipgr register definitions */ #define LPC_IPGR_LOAD_PART2(n) … #define LPC_IPGR_LOAD_PART1(n) … /* * clrt register definitions */ #define LPC_CLRT_LOAD_RETRY_MAX(n) … #define LPC_CLRT_LOAD_COLLISION_WINDOW(n) … /* * maxf register definitions */ #define LPC_MAXF_LOAD_MAX_FRAME_LEN(n) … /* * supp register definitions */ #define LPC_SUPP_SPEED … #define LPC_SUPP_RESET_RMII … /* * test register definitions */ #define LPC_TEST_SHORTCUT_PAUSE_QUANTA … #define LPC_TEST_PAUSE … #define LPC_TEST_BACKPRESSURE … /* * mcfg register definitions */ #define LPC_MCFG_SCAN_INCREMENT … #define LPC_MCFG_SUPPRESS_PREAMBLE … #define LPC_MCFG_CLOCK_SELECT(n) … #define LPC_MCFG_CLOCK_HOST_DIV_4 … #define LPC_MCFG_CLOCK_HOST_DIV_6 … #define LPC_MCFG_CLOCK_HOST_DIV_8 … #define LPC_MCFG_CLOCK_HOST_DIV_10 … #define LPC_MCFG_CLOCK_HOST_DIV_14 … #define LPC_MCFG_CLOCK_HOST_DIV_20 … #define LPC_MCFG_CLOCK_HOST_DIV_28 … #define LPC_MCFG_RESET_MII_MGMT … /* * mcmd register definitions */ #define LPC_MCMD_READ … #define LPC_MCMD_SCAN … /* * madr register definitions */ #define LPC_MADR_REGISTER_ADDRESS(n) … #define LPC_MADR_PHY_0ADDRESS(n) … /* * mwtd register definitions */ #define LPC_MWDT_WRITE(n) … /* * mrdd register definitions */ #define LPC_MRDD_READ_MASK … /* * mind register definitions */ #define LPC_MIND_BUSY … #define LPC_MIND_SCANNING … #define LPC_MIND_NOT_VALID … #define LPC_MIND_MII_LINK_FAIL … /* * command register definitions */ #define LPC_COMMAND_RXENABLE … #define LPC_COMMAND_TXENABLE … #define LPC_COMMAND_REG_RESET … #define LPC_COMMAND_TXRESET … #define LPC_COMMAND_RXRESET … #define LPC_COMMAND_PASSRUNTFRAME … #define LPC_COMMAND_PASSRXFILTER … #define LPC_COMMAND_TXFLOWCONTROL … #define LPC_COMMAND_RMII … #define LPC_COMMAND_FULLDUPLEX … /* * status register definitions */ #define LPC_STATUS_RXACTIVE … #define LPC_STATUS_TXACTIVE … /* * tsv0 register definitions */ #define LPC_TSV0_CRC_ERROR … #define LPC_TSV0_LENGTH_CHECK_ERROR … #define LPC_TSV0_LENGTH_OUT_OF_RANGE … #define LPC_TSV0_DONE … #define LPC_TSV0_MULTICAST … #define LPC_TSV0_BROADCAST … #define LPC_TSV0_PACKET_DEFER … #define LPC_TSV0_ESCESSIVE_DEFER … #define LPC_TSV0_ESCESSIVE_COLLISION … #define LPC_TSV0_LATE_COLLISION … #define LPC_TSV0_GIANT … #define LPC_TSV0_UNDERRUN … #define LPC_TSV0_TOTAL_BYTES(n) … #define LPC_TSV0_CONTROL_FRAME … #define LPC_TSV0_PAUSE … #define LPC_TSV0_BACKPRESSURE … #define LPC_TSV0_VLAN … /* * tsv1 register definitions */ #define LPC_TSV1_TRANSMIT_BYTE_COUNT(n) … #define LPC_TSV1_COLLISION_COUNT(n) … /* * rsv register definitions */ #define LPC_RSV_RECEIVED_BYTE_COUNT(n) … #define LPC_RSV_RXDV_EVENT_IGNORED … #define LPC_RSV_RXDV_EVENT_PREVIOUSLY_SEEN … #define LPC_RSV_CARRIER_EVNT_PREVIOUS_SEEN … #define LPC_RSV_RECEIVE_CODE_VIOLATION … #define LPC_RSV_CRC_ERROR … #define LPC_RSV_LENGTH_CHECK_ERROR … #define LPC_RSV_LENGTH_OUT_OF_RANGE … #define LPC_RSV_RECEIVE_OK … #define LPC_RSV_MULTICAST … #define LPC_RSV_BROADCAST … #define LPC_RSV_DRIBBLE_NIBBLE … #define LPC_RSV_CONTROL_FRAME … #define LPC_RSV_PAUSE … #define LPC_RSV_UNSUPPORTED_OPCODE … #define LPC_RSV_VLAN … /* * flowcontrolcounter register definitions */ #define LPC_FCCR_MIRRORCOUNTER(n) … #define LPC_FCCR_PAUSETIMER(n) … /* * flowcontrolstatus register definitions */ #define LPC_FCCR_MIRRORCOUNTERCURRENT(n) … /* * rxfilterctrl, rxfilterwolstatus, and rxfilterwolclear shared * register definitions */ #define LPC_RXFLTRW_ACCEPTUNICAST … #define LPC_RXFLTRW_ACCEPTUBROADCAST … #define LPC_RXFLTRW_ACCEPTUMULTICAST … #define LPC_RXFLTRW_ACCEPTUNICASTHASH … #define LPC_RXFLTRW_ACCEPTUMULTICASTHASH … #define LPC_RXFLTRW_ACCEPTPERFECT … /* * rxfilterctrl register definitions */ #define LPC_RXFLTRWSTS_MAGICPACKETENWOL … #define LPC_RXFLTRWSTS_RXFILTERENWOL … /* * rxfilterwolstatus/rxfilterwolclear register definitions */ #define LPC_RXFLTRWSTS_RXFILTERWOL … #define LPC_RXFLTRWSTS_MAGICPACKETWOL … /* * intstatus, intenable, intclear, and Intset shared register * definitions */ #define LPC_MACINT_RXOVERRUNINTEN … #define LPC_MACINT_RXERRORONINT … #define LPC_MACINT_RXFINISHEDINTEN … #define LPC_MACINT_RXDONEINTEN … #define LPC_MACINT_TXUNDERRUNINTEN … #define LPC_MACINT_TXERRORINTEN … #define LPC_MACINT_TXFINISHEDINTEN … #define LPC_MACINT_TXDONEINTEN … #define LPC_MACINT_SOFTINTEN … #define LPC_MACINT_WAKEUPINTEN … /* * powerdown register definitions */ #define LPC_POWERDOWN_MACAHB … static phy_interface_t lpc_phy_interface_mode(struct device *dev) { … } static bool use_iram_for_net(struct device *dev) { … } /* Receive Status information word */ #define RXSTATUS_SIZE … #define RXSTATUS_CONTROL … #define RXSTATUS_VLAN … #define RXSTATUS_FILTER … #define RXSTATUS_MULTICAST … #define RXSTATUS_BROADCAST … #define RXSTATUS_CRC … #define RXSTATUS_SYMBOL … #define RXSTATUS_LENGTH … #define RXSTATUS_RANGE … #define RXSTATUS_ALIGN … #define RXSTATUS_OVERRUN … #define RXSTATUS_NODESC … #define RXSTATUS_LAST … #define RXSTATUS_ERROR … #define RXSTATUS_STATUS_ERROR … /* Receive Descriptor control word */ #define RXDESC_CONTROL_SIZE … #define RXDESC_CONTROL_INT … /* Transmit Status information word */ #define TXSTATUS_COLLISIONS_GET(x) … #define TXSTATUS_DEFER … #define TXSTATUS_EXCESSDEFER … #define TXSTATUS_EXCESSCOLL … #define TXSTATUS_LATECOLL … #define TXSTATUS_UNDERRUN … #define TXSTATUS_NODESC … #define TXSTATUS_ERROR … /* Transmit Descriptor control word */ #define TXDESC_CONTROL_SIZE … #define TXDESC_CONTROL_OVERRIDE … #define TXDESC_CONTROL_HUGE … #define TXDESC_CONTROL_PAD … #define TXDESC_CONTROL_CRC … #define TXDESC_CONTROL_LAST … #define TXDESC_CONTROL_INT … /* * Structure of a TX/RX descriptors and RX status */ struct txrx_desc_t { … }; struct rx_status_t { … }; /* * Device driver data structure */ struct netdata_local { … }; /* * MAC support functions */ static void __lpc_set_mac(struct netdata_local *pldat, const u8 *mac) { … } static void __lpc_get_mac(struct netdata_local *pldat, u8 *mac) { … } static void __lpc_params_setup(struct netdata_local *pldat) { … } static void __lpc_eth_reset(struct netdata_local *pldat) { … } static int __lpc_mii_mngt_reset(struct netdata_local *pldat) { … } static inline phys_addr_t __va_to_pa(void *addr, struct netdata_local *pldat) { … } static void lpc_eth_enable_int(void __iomem *regbase) { … } static void lpc_eth_disable_int(void __iomem *regbase) { … } /* Setup TX/RX descriptors */ static void __lpc_txrx_desc_setup(struct netdata_local *pldat) { … } static void __lpc_eth_init(struct netdata_local *pldat) { … } static void __lpc_eth_shutdown(struct netdata_local *pldat) { … } /* * MAC<--->PHY support functions */ static int lpc_mdio_read(struct mii_bus *bus, int phy_id, int phyreg) { … } static int lpc_mdio_write(struct mii_bus *bus, int phy_id, int phyreg, u16 phydata) { … } static int lpc_mdio_reset(struct mii_bus *bus) { … } static void lpc_handle_link_change(struct net_device *ndev) { … } static int lpc_mii_probe(struct net_device *ndev) { … } static int lpc_mii_init(struct netdata_local *pldat) { … } static void __lpc_handle_xmit(struct net_device *ndev) { … } static int __lpc_handle_recv(struct net_device *ndev, int budget) { … } static int lpc_eth_poll(struct napi_struct *napi, int budget) { … } static irqreturn_t __lpc_eth_interrupt(int irq, void *dev_id) { … } static int lpc_eth_close(struct net_device *ndev) { … } static netdev_tx_t lpc_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *ndev) { … } static int lpc_set_mac_address(struct net_device *ndev, void *p) { … } static void lpc_eth_set_multicast_list(struct net_device *ndev) { … } static int lpc_eth_open(struct net_device *ndev) { … } /* * Ethtool ops */ static void lpc_eth_ethtool_getdrvinfo(struct net_device *ndev, struct ethtool_drvinfo *info) { … } static u32 lpc_eth_ethtool_getmsglevel(struct net_device *ndev) { … } static void lpc_eth_ethtool_setmsglevel(struct net_device *ndev, u32 level) { … } static const struct ethtool_ops lpc_eth_ethtool_ops = …; static const struct net_device_ops lpc_netdev_ops = …; static int lpc_eth_drv_probe(struct platform_device *pdev) { … } static void lpc_eth_drv_remove(struct platform_device *pdev) { … } #ifdef CONFIG_PM static int lpc_eth_drv_suspend(struct platform_device *pdev, pm_message_t state) { … } static int lpc_eth_drv_resume(struct platform_device *pdev) { … } #endif static const struct of_device_id lpc_eth_match[] = …; MODULE_DEVICE_TABLE(of, lpc_eth_match); static struct platform_driver lpc_eth_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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