/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation */ #ifndef __QLCNIC_HW_H #define __QLCNIC_HW_H /* Common registers in 83xx and 82xx */ enum qlcnic_regs { … }; /* Read from an address offset from BAR0, existing registers */ #define QLC_SHARED_REG_RD32(a, addr) … /* Write to an address offset from BAR0, existing registers */ #define QLC_SHARED_REG_WR32(a, addr, value) … /* Read from a direct address offset from BAR0, additional registers */ #define QLCRDX(ahw, addr) … /* Write to a direct address offset from BAR0, additional registers */ #define QLCWRX(ahw, addr, value) … #define QLCNIC_CMD_CONFIGURE_IP_ADDR … #define QLCNIC_CMD_CONFIG_INTRPT … #define QLCNIC_CMD_CREATE_RX_CTX … #define QLCNIC_CMD_DESTROY_RX_CTX … #define QLCNIC_CMD_CREATE_TX_CTX … #define QLCNIC_CMD_DESTROY_TX_CTX … #define QLCNIC_CMD_CONFIGURE_LRO … #define QLCNIC_CMD_CONFIGURE_MAC_LEARNING … #define QLCNIC_CMD_GET_STATISTICS … #define QLCNIC_CMD_INTRPT_TEST … #define QLCNIC_CMD_SET_MTU … #define QLCNIC_CMD_READ_PHY … #define QLCNIC_CMD_WRITE_PHY … #define QLCNIC_CMD_READ_HW_REG … #define QLCNIC_CMD_GET_FLOW_CTL … #define QLCNIC_CMD_SET_FLOW_CTL … #define QLCNIC_CMD_READ_MAX_MTU … #define QLCNIC_CMD_READ_MAX_LRO … #define QLCNIC_CMD_MAC_ADDRESS … #define QLCNIC_CMD_GET_PCI_INFO … #define QLCNIC_CMD_GET_NIC_INFO … #define QLCNIC_CMD_SET_NIC_INFO … #define QLCNIC_CMD_GET_ESWITCH_CAPABILITY … #define QLCNIC_CMD_TOGGLE_ESWITCH … #define QLCNIC_CMD_GET_ESWITCH_STATUS … #define QLCNIC_CMD_SET_PORTMIRRORING … #define QLCNIC_CMD_CONFIGURE_ESWITCH … #define QLCNIC_CMD_GET_ESWITCH_PORT_CONFIG … #define QLCNIC_CMD_GET_ESWITCH_STATS … #define QLCNIC_CMD_CONFIG_PORT … #define QLCNIC_CMD_TEMP_SIZE … #define QLCNIC_CMD_GET_TEMP_HDR … #define QLCNIC_CMD_BC_EVENT_SETUP … #define QLCNIC_CMD_CONFIG_VPORT … #define QLCNIC_CMD_DCB_QUERY_CAP … #define QLCNIC_CMD_DCB_QUERY_PARAM … #define QLCNIC_CMD_GET_MAC_STATS … #define QLCNIC_CMD_82XX_SET_DRV_VER … #define QLCNIC_CMD_MQ_TX_CONFIG_INTR … #define QLCNIC_CMD_GET_LED_STATUS … #define QLCNIC_CMD_CONFIGURE_RSS … #define QLCNIC_CMD_CONFIG_INTR_COAL … #define QLCNIC_CMD_CONFIGURE_LED … #define QLCNIC_CMD_CONFIG_MAC_VLAN … #define QLCNIC_CMD_GET_LINK_EVENT … #define QLCNIC_CMD_CONFIGURE_MAC_RX_MODE … #define QLCNIC_CMD_CONFIGURE_HW_LRO … #define QLCNIC_CMD_SET_INGRESS_ENCAP … #define QLCNIC_CMD_INIT_NIC_FUNC … #define QLCNIC_CMD_STOP_NIC_FUNC … #define QLCNIC_CMD_IDC_ACK … #define QLCNIC_CMD_SET_PORT_CONFIG … #define QLCNIC_CMD_GET_PORT_CONFIG … #define QLCNIC_CMD_GET_LINK_STATUS … #define QLCNIC_CMD_SET_LED_CONFIG … #define QLCNIC_CMD_GET_LED_CONFIG … #define QLCNIC_CMD_83XX_SET_DRV_VER … #define QLCNIC_CMD_ADD_RCV_RINGS … #define QLCNIC_CMD_83XX_EXTEND_ISCSI_DUMP_CAP … #define QLCNIC_INTRPT_INTX … #define QLCNIC_INTRPT_MSIX … #define QLCNIC_INTRPT_ADD … #define QLCNIC_INTRPT_DEL … #define QLCNIC_GET_CURRENT_MAC … #define QLCNIC_SET_STATION_MAC … #define QLCNIC_GET_DEFAULT_MAC … #define QLCNIC_GET_FAC_DEF_MAC … #define QLCNIC_SET_FAC_DEF_MAC … #define QLCNIC_MBX_LINK_EVENT … #define QLCNIC_MBX_BC_EVENT … #define QLCNIC_MBX_COMP_EVENT … #define QLCNIC_MBX_REQUEST_EVENT … #define QLCNIC_MBX_TIME_EXTEND_EVENT … #define QLCNIC_MBX_DCBX_CONFIG_CHANGE_EVENT … #define QLCNIC_MBX_SFP_INSERT_EVENT … #define QLCNIC_MBX_SFP_REMOVE_EVENT … struct qlcnic_mailbox_metadata { … }; /* Mailbox ownership */ #define QLCNIC_GET_OWNER(val) … #define QLCNIC_SET_OWNER … #define QLCNIC_CLR_OWNER … #define QLCNIC_MBX_TIMEOUT … #define QLCNIC_MBX_RSP_OK … #define QLCNIC_MBX_PORT_RSP_OK … #define QLCNIC_MBX_ASYNC_EVENT … /* Set HW Tx ring limit for 82xx adapter. */ #define QLCNIC_MAX_HW_TX_RINGS … #define QLCNIC_MAX_HW_VNIC_TX_RINGS … #define QLCNIC_MAX_TX_RINGS … #define QLCNIC_MAX_SDS_RINGS … struct qlcnic_pci_info; struct qlcnic_info; struct qlcnic_cmd_args; struct ethtool_stats; struct pci_device_id; struct qlcnic_host_sds_ring; struct qlcnic_host_tx_ring; struct qlcnic_hardware_context; struct qlcnic_adapter; struct qlcnic_fw_dump; int qlcnic_82xx_hw_read_wx_2M(struct qlcnic_adapter *adapter, ulong, int *); int qlcnic_82xx_hw_write_wx_2M(struct qlcnic_adapter *, ulong, u32); int qlcnic_82xx_config_hw_lro(struct qlcnic_adapter *adapter, int); int qlcnic_82xx_nic_set_promisc(struct qlcnic_adapter *adapter, u32); int qlcnic_82xx_napi_add(struct qlcnic_adapter *adapter, struct net_device *netdev); void qlcnic_82xx_get_beacon_state(struct qlcnic_adapter *); void qlcnic_82xx_change_filter(struct qlcnic_adapter *adapter, u64 *uaddr, u16 vlan_id, struct qlcnic_host_tx_ring *tx_ring); int qlcnic_82xx_config_intr_coalesce(struct qlcnic_adapter *, struct ethtool_coalesce *); int qlcnic_82xx_set_rx_coalesce(struct qlcnic_adapter *); int qlcnic_82xx_config_rss(struct qlcnic_adapter *adapter, int); void qlcnic_82xx_config_ipaddr(struct qlcnic_adapter *adapter, __be32, int); int qlcnic_82xx_linkevent_request(struct qlcnic_adapter *adapter, int); void qlcnic_82xx_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring); int qlcnic_82xx_clear_lb_mode(struct qlcnic_adapter *adapter, u8); int qlcnic_82xx_set_lb_mode(struct qlcnic_adapter *, u8); void qlcnic_82xx_write_crb(struct qlcnic_adapter *, char *, loff_t, size_t); void qlcnic_82xx_read_crb(struct qlcnic_adapter *, char *, loff_t, size_t); int qlcnic_82xx_issue_cmd(struct qlcnic_adapter *adapter, struct qlcnic_cmd_args *); int qlcnic_82xx_mq_intrpt(struct qlcnic_adapter *, int); int qlcnic_82xx_config_intrpt(struct qlcnic_adapter *, u8); int qlcnic_82xx_fw_cmd_create_rx_ctx(struct qlcnic_adapter *); int qlcnic_82xx_fw_cmd_create_tx_ctx(struct qlcnic_adapter *, struct qlcnic_host_tx_ring *tx_ring, int); void qlcnic_82xx_fw_cmd_del_rx_ctx(struct qlcnic_adapter *); void qlcnic_82xx_fw_cmd_del_tx_ctx(struct qlcnic_adapter *, struct qlcnic_host_tx_ring *); int qlcnic_82xx_sre_macaddr_change(struct qlcnic_adapter *, u8 *, u16, u8); int qlcnic_82xx_get_mac_address(struct qlcnic_adapter *, u8*, u8); int qlcnic_82xx_get_nic_info(struct qlcnic_adapter *, struct qlcnic_info *, u8); int qlcnic_82xx_set_nic_info(struct qlcnic_adapter *, struct qlcnic_info *); int qlcnic_82xx_get_pci_info(struct qlcnic_adapter *, struct qlcnic_pci_info*); int qlcnic_82xx_alloc_mbx_args(struct qlcnic_cmd_args *, struct qlcnic_adapter *, u32); int qlcnic_82xx_get_board_info(struct qlcnic_adapter *); int qlcnic_82xx_config_led(struct qlcnic_adapter *, u32, u32); void qlcnic_82xx_get_func_no(struct qlcnic_adapter *); int qlcnic_82xx_api_lock(struct qlcnic_adapter *); void qlcnic_82xx_api_unlock(struct qlcnic_adapter *); void qlcnic_82xx_napi_enable(struct qlcnic_adapter *); void qlcnic_82xx_napi_disable(struct qlcnic_adapter *); void qlcnic_82xx_napi_del(struct qlcnic_adapter *); int qlcnic_82xx_shutdown(struct pci_dev *); int qlcnic_82xx_resume(struct qlcnic_adapter *); void qlcnic_clr_all_drv_state(struct qlcnic_adapter *adapter, u8 failed); void qlcnic_fw_poll_work(struct work_struct *work); u32 qlcnic_82xx_get_saved_state(void *, u32); void qlcnic_82xx_set_saved_state(void *, u32, u32); void qlcnic_82xx_cache_tmpl_hdr_values(struct qlcnic_fw_dump *); u32 qlcnic_82xx_get_cap_size(void *, int); void qlcnic_82xx_set_sys_info(void *, int, u32); void qlcnic_82xx_store_cap_mask(void *, u32); #endif /* __QLCNIC_HW_H_ */
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