/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2003 - 2009 NetXen, Inc. * Copyright (C) 2009 - QLogic Corporation. * All rights reserved. */ #ifndef _NETXEN_NIC_H_ #define _NETXEN_NIC_H_ #include <linux/module.h> #include <linux/kernel.h> #include <linux/types.h> #include <linux/ioport.h> #include <linux/pci.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> #include <linux/ip.h> #include <linux/in.h> #include <linux/tcp.h> #include <linux/skbuff.h> #include <linux/firmware.h> #include <linux/ethtool.h> #include <linux/mii.h> #include <linux/timer.h> #include <linux/vmalloc.h> #include <asm/io.h> #include <asm/byteorder.h> #include "netxen_nic_hdr.h" #include "netxen_nic_hw.h" #define _NETXEN_NIC_LINUX_MAJOR … #define _NETXEN_NIC_LINUX_MINOR … #define _NETXEN_NIC_LINUX_SUBVERSION … #define NETXEN_NIC_LINUX_VERSIONID … #define NETXEN_VERSION_CODE(a, b, c) … #define _major(v) … #define _minor(v) … #define _build(v) … /* version in image has weird encoding: * 7:0 - major * 15:8 - minor * 31:16 - build (little endian) */ #define NETXEN_DECODE_VERSION(v) … #define NETXEN_NUM_FLASH_SECTORS … #define NETXEN_FLASH_SECTOR_SIZE … #define NETXEN_FLASH_TOTAL_SIZE … #define RCV_DESC_RINGSIZE(rds_ring) … #define RCV_BUFF_RINGSIZE(rds_ring) … #define STATUS_DESC_RINGSIZE(sds_ring) … #define TX_BUFF_RINGSIZE(tx_ring) … #define TX_DESC_RINGSIZE(tx_ring) … #define find_diff_among(a,b,range) … #define NETXEN_RCV_PRODUCER_OFFSET … #define NETXEN_RCV_PEG_DB_ID … #define NETXEN_HOST_DUMMY_DMA_SIZE … #define FLASH_SUCCESS … #define ADDR_IN_WINDOW1(off) … #define ADDR_IN_RANGE(addr, low, high) … /* * normalize a 64MB crb address to 32MB PCI window * To use NETXEN_CRB_NORMALIZE, window _must_ be set to 1 */ #define NETXEN_CRB_NORMAL(reg) … #define NETXEN_CRB_NORMALIZE(adapter, reg) … #define DB_NORMALIZE(adapter, off) … #define NX_P2_C0 … #define NX_P2_C1 … #define NX_P3_A0 … #define NX_P3_A2 … #define NX_P3_B0 … #define NX_P3_B1 … #define NX_P3_B2 … #define NX_P3P_A0 … #define NX_IS_REVISION_P2(REVISION) … #define NX_IS_REVISION_P3(REVISION) … #define NX_IS_REVISION_P3P(REVISION) … #define FIRST_PAGE_GROUP_START … #define FIRST_PAGE_GROUP_END … #define SECOND_PAGE_GROUP_START … #define SECOND_PAGE_GROUP_END … #define THIRD_PAGE_GROUP_START … #define THIRD_PAGE_GROUP_END … #define FIRST_PAGE_GROUP_SIZE … #define SECOND_PAGE_GROUP_SIZE … #define THIRD_PAGE_GROUP_SIZE … #define P2_MAX_MTU … #define P3_MAX_MTU … #define NX_ETHERMTU … #define NX_MAX_ETHERHDR … #define NX_P2_RX_BUF_MAX_LEN … #define NX_P3_RX_BUF_MAX_LEN … #define NX_P2_RX_JUMBO_BUF_MAX_LEN … #define NX_P3_RX_JUMBO_BUF_MAX_LEN … #define NX_CT_DEFAULT_RX_BUF_LEN … #define NX_LRO_BUFFER_EXTRA … #define NX_RX_LRO_BUFFER_LENGTH … /* * Maximum number of ring contexts */ #define MAX_RING_CTX … /* Opcodes to be used with the commands */ #define TX_ETHER_PKT … #define TX_TCP_PKT … #define TX_UDP_PKT … #define TX_IP_PKT … #define TX_TCP_LSO … #define TX_TCP_LSO6 … #define TX_IPSEC … #define TX_IPSEC_CMD … #define TX_TCPV6_PKT … #define TX_UDPV6_PKT … /* The following opcodes are for internal consumption. */ #define NETXEN_CONTROL_OP … #define PEGNET_REQUEST … #define MAX_NUM_CARDS … #define NETXEN_MAX_FRAGS_PER_TX … #define MAX_TSO_HEADER_DESC … #define MGMT_CMD_DESC_RESV … #define TX_STOP_THRESH … #define NX_MAX_TX_TIMEOUTS … /* * Following are the states of the Phantom. Phantom will set them and * Host will read to check if the fields are correct. */ #define PHAN_INITIALIZE_START … #define PHAN_INITIALIZE_FAILED … #define PHAN_INITIALIZE_COMPLETE … /* Host writes the following to notify that it has done the init-handshake */ #define PHAN_INITIALIZE_ACK … #define NUM_RCV_DESC_RINGS … #define NUM_STS_DESC_RINGS … #define RCV_RING_NORMAL … #define RCV_RING_JUMBO … #define RCV_RING_LRO … #define MIN_CMD_DESCRIPTORS … #define MIN_RCV_DESCRIPTORS … #define MIN_JUMBO_DESCRIPTORS … #define MAX_CMD_DESCRIPTORS … #define MAX_RCV_DESCRIPTORS_1G … #define MAX_RCV_DESCRIPTORS_10G … #define MAX_JUMBO_RCV_DESCRIPTORS_1G … #define MAX_JUMBO_RCV_DESCRIPTORS_10G … #define MAX_LRO_RCV_DESCRIPTORS … #define DEFAULT_RCV_DESCRIPTORS_1G … #define DEFAULT_RCV_DESCRIPTORS_10G … #define NETXEN_CTX_SIGNATURE … #define NETXEN_CTX_SIGNATURE_V2 … #define NETXEN_CTX_RESET … #define NETXEN_CTX_D3_RESET … #define NETXEN_RCV_PRODUCER(ringid) … #define PHAN_PEG_RCV_INITIALIZED … #define PHAN_PEG_RCV_START_INITIALIZE … #define get_next_index(index, length) … #define get_index_range(index,length,count) … #define MPORT_SINGLE_FUNCTION_MODE … #define MPORT_MULTI_FUNCTION_MODE … #define NX_MAX_PCI_FUNC … /* * NetXen host-peg signal message structure * * Bit 0-1 : peg_id => 0x2 for tx and 01 for rx * Bit 2 : priv_id => must be 1 * Bit 3-17 : count => for doorbell * Bit 18-27 : ctx_id => Context id * Bit 28-31 : opcode */ netxen_ctx_msg; #define netxen_set_msg_peg_id(config_word, val) … #define netxen_set_msg_privid(config_word) … #define netxen_set_msg_count(config_word, val) … #define netxen_set_msg_ctxid(config_word, val) … #define netxen_set_msg_opcode(config_word, val) … struct netxen_rcv_ring { … }; struct netxen_sts_ring { … } ; struct netxen_ring_ctx { … } __attribute__ ((aligned …)); /* * Following data structures describe the descriptors that will be used. * Added fileds of tcpHdrSize and ipHdrSize, The driver needs to do it only when * we are doing LSO (above the 1500 size packet) only. */ /* * The size of reference handle been changed to 16 bits to pass the MSS fields * for the LSO packet */ #define FLAGS_CHECKSUM_ENABLED … #define FLAGS_LSO_ENABLED … #define FLAGS_IPSEC_SA_ADD … #define FLAGS_IPSEC_SA_DELETE … #define FLAGS_VLAN_TAGGED … #define FLAGS_VLAN_OOB … #define netxen_set_tx_vlan_tci(cmd_desc, v) … #define netxen_set_cmd_desc_port(cmd_desc, var) … #define netxen_set_cmd_desc_ctxid(cmd_desc, var) … #define netxen_set_tx_port(_desc, _port) … #define netxen_set_tx_flags_opcode(_desc, _flags, _opcode) … #define netxen_set_tx_frags_len(_desc, _frags, _len) … struct cmd_desc_type0 { … } __attribute__ ((aligned …)); /* Note: sizeof(rcv_desc) should always be a multiple of 2 */ struct rcv_desc { … }; /* opcode field in status_desc */ #define NETXEN_NIC_SYN_OFFLOAD … #define NETXEN_NIC_RXPKT_DESC … #define NETXEN_OLD_RXPKT_DESC … #define NETXEN_NIC_RESPONSE_DESC … #define NETXEN_NIC_LRO_DESC … /* for status field in status_desc */ #define STATUS_NEED_CKSUM … #define STATUS_CKSUM_OK … /* owner bits of status_desc */ #define STATUS_OWNER_HOST … #define STATUS_OWNER_PHANTOM … /* Status descriptor: 0-3 port, 4-7 status, 8-11 type, 12-27 total_length 28-43 reference_handle, 44-47 protocol, 48-52 pkt_offset 53-55 desc_cnt, 56-57 owner, 58-63 opcode */ #define netxen_get_sts_port(sts_data) … #define netxen_get_sts_status(sts_data) … #define netxen_get_sts_type(sts_data) … #define netxen_get_sts_totallength(sts_data) … #define netxen_get_sts_refhandle(sts_data) … #define netxen_get_sts_prot(sts_data) … #define netxen_get_sts_pkt_offset(sts_data) … #define netxen_get_sts_desc_cnt(sts_data) … #define netxen_get_sts_opcode(sts_data) … #define netxen_get_lro_sts_refhandle(sts_data) … #define netxen_get_lro_sts_length(sts_data) … #define netxen_get_lro_sts_l2_hdr_offset(sts_data) … #define netxen_get_lro_sts_l4_hdr_offset(sts_data) … #define netxen_get_lro_sts_timestamp(sts_data) … #define netxen_get_lro_sts_type(sts_data) … #define netxen_get_lro_sts_push_flag(sts_data) … #define netxen_get_lro_sts_seq_number(sts_data) … #define netxen_get_lro_sts_mss(sts_data1) … struct status_desc { … } __attribute__ ((aligned …)); /* UNIFIED ROMIMAGE *************************/ #define NX_UNI_DIR_SECT_PRODUCT_TBL … #define NX_UNI_DIR_SECT_BOOTLD … #define NX_UNI_DIR_SECT_FW … /*Offsets */ #define NX_UNI_CHIP_REV_OFF … #define NX_UNI_FLAGS_OFF … #define NX_UNI_BIOS_VERSION_OFF … #define NX_UNI_BOOTLD_IDX_OFF … #define NX_UNI_FIRMWARE_IDX_OFF … struct uni_table_desc{ … }; struct uni_data_desc{ … }; /* UNIFIED ROMIMAGE *************************/ /* The version of the main data structure */ #define NETXEN_BDINFO_VERSION … /* Magic number to let user know flash is programmed */ #define NETXEN_BDINFO_MAGIC … /* Max number of Gig ports on a Phantom board */ #define NETXEN_MAX_PORTS … #define NETXEN_BRDTYPE_P1_BD … #define NETXEN_BRDTYPE_P1_SB … #define NETXEN_BRDTYPE_P1_SMAX … #define NETXEN_BRDTYPE_P1_SOCK … #define NETXEN_BRDTYPE_P2_SOCK_31 … #define NETXEN_BRDTYPE_P2_SOCK_35 … #define NETXEN_BRDTYPE_P2_SB35_4G … #define NETXEN_BRDTYPE_P2_SB31_10G … #define NETXEN_BRDTYPE_P2_SB31_2G … #define NETXEN_BRDTYPE_P2_SB31_10G_IMEZ … #define NETXEN_BRDTYPE_P2_SB31_10G_HMEZ … #define NETXEN_BRDTYPE_P2_SB31_10G_CX4 … #define NETXEN_BRDTYPE_P3_REF_QG … #define NETXEN_BRDTYPE_P3_HMEZ … #define NETXEN_BRDTYPE_P3_10G_CX4_LP … #define NETXEN_BRDTYPE_P3_4_GB … #define NETXEN_BRDTYPE_P3_IMEZ … #define NETXEN_BRDTYPE_P3_10G_SFP_PLUS … #define NETXEN_BRDTYPE_P3_10000_BASE_T … #define NETXEN_BRDTYPE_P3_XG_LOM … #define NETXEN_BRDTYPE_P3_4_GB_MM … #define NETXEN_BRDTYPE_P3_10G_SFP_CT … #define NETXEN_BRDTYPE_P3_10G_SFP_QT … #define NETXEN_BRDTYPE_P3_10G_CX4 … #define NETXEN_BRDTYPE_P3_10G_XFP … #define NETXEN_BRDTYPE_P3_10G_TP … /* Flash memory map */ #define NETXEN_CRBINIT_START … #define NETXEN_BRDCFG_START … #define NETXEN_INITCODE_START … #define NETXEN_BOOTLD_START … #define NETXEN_IMAGE_START … #define NETXEN_SECONDARY_START … #define NETXEN_PXE_START … #define NETXEN_USER_START … #define NETXEN_FIXED_START … #define NETXEN_USER_START_OLD … #define NX_OLD_MAC_ADDR_OFFSET … #define NX_FW_VERSION_OFFSET … #define NX_FW_SIZE_OFFSET … #define NX_FW_MAC_ADDR_OFFSET … #define NX_FW_SERIAL_NUM_OFFSET … #define NX_BIOS_VERSION_OFFSET … #define NX_HDR_VERSION_OFFSET … #define NX_BRDTYPE_OFFSET … #define NX_FW_MAGIC_OFFSET … #define NX_FW_MIN_SIZE … #define NX_P2_MN_ROMIMAGE … #define NX_P3_CT_ROMIMAGE … #define NX_P3_MN_ROMIMAGE … #define NX_UNIFIED_ROMIMAGE … #define NX_FLASH_ROMIMAGE … #define NX_UNKNOWN_ROMIMAGE … #define NX_P2_MN_ROMIMAGE_NAME … #define NX_P3_CT_ROMIMAGE_NAME … #define NX_P3_MN_ROMIMAGE_NAME … #define NX_UNIFIED_ROMIMAGE_NAME … #define NX_FLASH_ROMIMAGE_NAME … extern char netxen_nic_driver_name[]; /* Number of status descriptors to handle per interrupt */ #define MAX_STATUS_HANDLE … /* * netxen_skb_frag{} is to contain mapping info for each SG list. This * has to be freed when DMA is complete. This is part of netxen_tx_buffer{}. */ struct netxen_skb_frag { … }; struct netxen_recv_crb { … }; /* Following defines are for the state of the buffers */ #define NETXEN_BUFFER_FREE … #define NETXEN_BUFFER_BUSY … /* * There will be one netxen_buffer per skb packet. These will be * used to save the dma info for pci_unmap_page() */ struct netxen_cmd_buffer { … }; /* In rx_buffer, we do not need multiple fragments as is a single buffer */ struct netxen_rx_buffer { … }; /* Board types */ #define NETXEN_NIC_GBE … #define NETXEN_NIC_XGBE … /* * One hardware_context{} per adapter * contains interrupt info as well shared hardware info. */ struct netxen_hardware_context { … }; #define MINIMUM_ETHERNET_FRAME_SIZE … #define ETHERNET_FCS_SIZE … struct netxen_adapter_stats { … }; /* * Rcv Descriptor Context. One such per Rcv Descriptor. There may * be one Rcv Descriptor for normal packets, one for jumbo and may be others. */ struct nx_host_rds_ring { … }; struct nx_host_sds_ring { … }; struct nx_host_tx_ring { … }; /* * Receive context. There is one such structure per instance of the * receive processing. Any state information that is relevant to * the receive, and is must be in this structure. The global data may be * present elsewhere. */ struct netxen_recv_context { … }; struct _cdrp_cmd { … }; struct netxen_cmd_args { … }; /* New HW context creation */ #define NX_OS_CRB_RETRY_COUNT … #define NX_CDRP_SIGNATURE_MAKE(pcifn, version) … #define NX_CDRP_CLEAR … #define NX_CDRP_CMD_BIT … /* * All responses must have the NX_CDRP_CMD_BIT cleared * in the crb NX_CDRP_CRB_OFFSET. */ #define NX_CDRP_FORM_RSP(rsp) … #define NX_CDRP_IS_RSP(rsp) … #define NX_CDRP_RSP_OK … #define NX_CDRP_RSP_FAIL … #define NX_CDRP_RSP_TIMEOUT … /* * All commands must have the NX_CDRP_CMD_BIT set in * the crb NX_CDRP_CRB_OFFSET. */ #define NX_CDRP_FORM_CMD(cmd) … #define NX_CDRP_IS_CMD(cmd) … #define NX_CDRP_CMD_SUBMIT_CAPABILITIES … #define NX_CDRP_CMD_READ_MAX_RDS_PER_CTX … #define NX_CDRP_CMD_READ_MAX_SDS_PER_CTX … #define NX_CDRP_CMD_READ_MAX_RULES_PER_CTX … #define NX_CDRP_CMD_READ_MAX_RX_CTX … #define NX_CDRP_CMD_READ_MAX_TX_CTX … #define NX_CDRP_CMD_CREATE_RX_CTX … #define NX_CDRP_CMD_DESTROY_RX_CTX … #define NX_CDRP_CMD_CREATE_TX_CTX … #define NX_CDRP_CMD_DESTROY_TX_CTX … #define NX_CDRP_CMD_SETUP_STATISTICS … #define NX_CDRP_CMD_GET_STATISTICS … #define NX_CDRP_CMD_DELETE_STATISTICS … #define NX_CDRP_CMD_SET_MTU … #define NX_CDRP_CMD_READ_PHY … #define NX_CDRP_CMD_WRITE_PHY … #define NX_CDRP_CMD_READ_HW_REG … #define NX_CDRP_CMD_GET_FLOW_CTL … #define NX_CDRP_CMD_SET_FLOW_CTL … #define NX_CDRP_CMD_READ_MAX_MTU … #define NX_CDRP_CMD_READ_MAX_LRO … #define NX_CDRP_CMD_CONFIGURE_TOE … #define NX_CDRP_CMD_FUNC_ATTRIB … #define NX_CDRP_CMD_READ_PEXQ_PARAMETERS … #define NX_CDRP_CMD_GET_LIC_CAPABILITIES … #define NX_CDRP_CMD_READ_MAX_LRO_PER_BOARD … #define NX_CDRP_CMD_CONFIG_GBE_PORT … #define NX_CDRP_CMD_MAX … #define NX_RCODE_SUCCESS … #define NX_RCODE_NO_HOST_MEM … #define NX_RCODE_NO_HOST_RESOURCE … #define NX_RCODE_NO_CARD_CRB … #define NX_RCODE_NO_CARD_MEM … #define NX_RCODE_NO_CARD_RESOURCE … #define NX_RCODE_INVALID_ARGS … #define NX_RCODE_INVALID_ACTION … #define NX_RCODE_INVALID_STATE … #define NX_RCODE_NOT_SUPPORTED … #define NX_RCODE_NOT_PERMITTED … #define NX_RCODE_NOT_READY … #define NX_RCODE_DOES_NOT_EXIST … #define NX_RCODE_ALREADY_EXISTS … #define NX_RCODE_BAD_SIGNATURE … #define NX_RCODE_CMD_NOT_IMPL … #define NX_RCODE_CMD_INVALID … #define NX_RCODE_TIMEOUT … #define NX_RCODE_CMD_FAILED … #define NX_RCODE_MAX_EXCEEDED … #define NX_RCODE_MAX … #define NX_DESTROY_CTX_RESET … #define NX_DESTROY_CTX_D3_RESET … #define NX_DESTROY_CTX_MAX … /* * Capabilities */ #define NX_CAP_BIT(class, bit) … #define NX_CAP0_LEGACY_CONTEXT … #define NX_CAP0_MULTI_CONTEXT … #define NX_CAP0_LEGACY_MN … #define NX_CAP0_LEGACY_MS … #define NX_CAP0_CUT_THROUGH … #define NX_CAP0_LRO … #define NX_CAP0_LSO … #define NX_CAP0_JUMBO_CONTIGUOUS … #define NX_CAP0_LRO_CONTIGUOUS … #define NX_CAP0_HW_LRO … #define NX_CAP0_HW_LRO_MSS … /* * Context state */ #define NX_HOST_CTX_STATE_FREED … #define NX_HOST_CTX_STATE_ALLOCATED … #define NX_HOST_CTX_STATE_ACTIVE … #define NX_HOST_CTX_STATE_DISABLED … #define NX_HOST_CTX_STATE_QUIESCED … #define NX_HOST_CTX_STATE_MAX … /* * Rx context */ nx_hostrq_sds_ring_t; nx_hostrq_rds_ring_t; nx_hostrq_rx_ctx_t; nx_cardrsp_rds_ring_t; nx_cardrsp_sds_ring_t; nx_cardrsp_rx_ctx_t; #define SIZEOF_HOSTRQ_RX(HOSTRQ_RX, rds_rings, sds_rings) … #define SIZEOF_CARDRSP_RX(CARDRSP_RX, rds_rings, sds_rings) … /* * Tx context */ nx_hostrq_cds_ring_t; nx_hostrq_tx_ctx_t; nx_cardrsp_cds_ring_t; nx_cardrsp_tx_ctx_t; #define SIZEOF_HOSTRQ_TX(HOSTRQ_TX) … #define SIZEOF_CARDRSP_TX(CARDRSP_TX) … /* CRB */ #define NX_HOST_RDS_CRB_MODE_UNIQUE … #define NX_HOST_RDS_CRB_MODE_SHARED … #define NX_HOST_RDS_CRB_MODE_CUSTOM … #define NX_HOST_RDS_CRB_MODE_MAX … #define NX_HOST_INT_CRB_MODE_UNIQUE … #define NX_HOST_INT_CRB_MODE_SHARED … #define NX_HOST_INT_CRB_MODE_NORX … #define NX_HOST_INT_CRB_MODE_NOTX … #define NX_HOST_INT_CRB_MODE_NORXTX … /* MAC */ #define MC_COUNT_P2 … #define MC_COUNT_P3 … #define NETXEN_MAC_NOOP … #define NETXEN_MAC_ADD … #define NETXEN_MAC_DEL … nx_mac_list_t; struct nx_ip_list { … }; /* * Interrupt coalescing defaults. The defaults are for 1500 MTU. It is * adjusted based on configured MTU. */ #define NETXEN_DEFAULT_INTR_COALESCE_RX_TIME_US … #define NETXEN_DEFAULT_INTR_COALESCE_RX_PACKETS … #define NETXEN_DEFAULT_INTR_COALESCE_TX_PACKETS … #define NETXEN_DEFAULT_INTR_COALESCE_TX_TIME_US … #define NETXEN_NIC_INTR_DEFAULT … nx_nic_intr_coalesce_data_t; nx_nic_intr_coalesce_t; #define NX_HOST_REQUEST … #define NX_NIC_REQUEST … #define NX_MAC_EVENT … #define NX_IP_UP … #define NX_IP_DOWN … /* * Driver --> Firmware */ #define NX_NIC_H2C_OPCODE_START … #define NX_NIC_H2C_OPCODE_CONFIG_RSS … #define NX_NIC_H2C_OPCODE_CONFIG_RSS_TBL … #define NX_NIC_H2C_OPCODE_CONFIG_INTR_COALESCE … #define NX_NIC_H2C_OPCODE_CONFIG_LED … #define NX_NIC_H2C_OPCODE_CONFIG_PROMISCUOUS … #define NX_NIC_H2C_OPCODE_CONFIG_L2_MAC … #define NX_NIC_H2C_OPCODE_LRO_REQUEST … #define NX_NIC_H2C_OPCODE_GET_SNMP_STATS … #define NX_NIC_H2C_OPCODE_PROXY_START_REQUEST … #define NX_NIC_H2C_OPCODE_PROXY_STOP_REQUEST … #define NX_NIC_H2C_OPCODE_PROXY_SET_MTU … #define NX_NIC_H2C_OPCODE_PROXY_SET_VPORT_MISS_MODE … #define NX_NIC_H2C_OPCODE_GET_FINGER_PRINT_REQUEST … #define NX_NIC_H2C_OPCODE_INSTALL_LICENSE_REQUEST … #define NX_NIC_H2C_OPCODE_GET_LICENSE_CAPABILITY_REQUEST … #define NX_NIC_H2C_OPCODE_GET_NET_STATS … #define NX_NIC_H2C_OPCODE_PROXY_UPDATE_P2V … #define NX_NIC_H2C_OPCODE_CONFIG_IPADDR … #define NX_NIC_H2C_OPCODE_CONFIG_LOOPBACK … #define NX_NIC_H2C_OPCODE_PROXY_STOP_DONE … #define NX_NIC_H2C_OPCODE_GET_LINKEVENT … #define NX_NIC_C2C_OPCODE … #define NX_NIC_H2C_OPCODE_CONFIG_BRIDGING … #define NX_NIC_H2C_OPCODE_CONFIG_HW_LRO … #define NX_NIC_H2C_OPCODE_LAST … /* * Firmware --> Driver */ #define NX_NIC_C2H_OPCODE_START … #define NX_NIC_C2H_OPCODE_CONFIG_RSS_RESPONSE … #define NX_NIC_C2H_OPCODE_CONFIG_RSS_TBL_RESPONSE … #define NX_NIC_C2H_OPCODE_CONFIG_MAC_RESPONSE … #define NX_NIC_C2H_OPCODE_CONFIG_PROMISCUOUS_RESPONSE … #define NX_NIC_C2H_OPCODE_CONFIG_L2_MAC_RESPONSE … #define NX_NIC_C2H_OPCODE_LRO_DELETE_RESPONSE … #define NX_NIC_C2H_OPCODE_LRO_ADD_FAILURE_RESPONSE … #define NX_NIC_C2H_OPCODE_GET_SNMP_STATS … #define NX_NIC_C2H_OPCODE_GET_FINGER_PRINT_REPLY … #define NX_NIC_C2H_OPCODE_INSTALL_LICENSE_REPLY … #define NX_NIC_C2H_OPCODE_GET_LICENSE_CAPABILITIES_REPLY … #define NX_NIC_C2H_OPCODE_GET_NET_STATS_RESPONSE … #define NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE … #define NX_NIC_C2H_OPCODE_LAST … #define VPORT_MISS_MODE_DROP … #define VPORT_MISS_MODE_ACCEPT_ALL … #define VPORT_MISS_MODE_ACCEPT_MULTI … #define NX_NIC_LRO_REQUEST_FIRST … #define NX_NIC_LRO_REQUEST_ADD_FLOW … #define NX_NIC_LRO_REQUEST_DELETE_FLOW … #define NX_NIC_LRO_REQUEST_TIMER … #define NX_NIC_LRO_REQUEST_CLEANUP … #define NX_NIC_LRO_REQUEST_ADD_FLOW_SCHEDULED … #define NX_TOE_LRO_REQUEST_ADD_FLOW … #define NX_TOE_LRO_REQUEST_ADD_FLOW_RESPONSE … #define NX_TOE_LRO_REQUEST_DELETE_FLOW … #define NX_TOE_LRO_REQUEST_DELETE_FLOW_RESPONSE … #define NX_TOE_LRO_REQUEST_TIMER … #define NX_NIC_LRO_REQUEST_LAST … #define NX_FW_CAPABILITY_LINK_NOTIFICATION … #define NX_FW_CAPABILITY_SWITCHING … #define NX_FW_CAPABILITY_PEXQ … #define NX_FW_CAPABILITY_BDG … #define NX_FW_CAPABILITY_FVLANTX … #define NX_FW_CAPABILITY_HW_LRO … #define NX_FW_CAPABILITY_GBE_LINK_CFG … #define NX_FW_CAPABILITY_MORE_CAPS … #define NX_FW_CAPABILITY_2_LRO_MAX_TCP_SEG … /* module types */ #define LINKEVENT_MODULE_NOT_PRESENT … #define LINKEVENT_MODULE_OPTICAL_UNKNOWN … #define LINKEVENT_MODULE_OPTICAL_SRLR … #define LINKEVENT_MODULE_OPTICAL_LRM … #define LINKEVENT_MODULE_OPTICAL_SFP_1G … #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE … #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN … #define LINKEVENT_MODULE_TWINAX … #define LINKSPEED_10GBPS … #define LINKSPEED_1GBPS … #define LINKSPEED_100MBPS … #define LINKSPEED_10MBPS … #define LINKSPEED_ENCODED_10MBPS … #define LINKSPEED_ENCODED_100MBPS … #define LINKSPEED_ENCODED_1GBPS … #define LINKEVENT_AUTONEG_DISABLED … #define LINKEVENT_AUTONEG_ENABLED … #define LINKEVENT_HALF_DUPLEX … #define LINKEVENT_FULL_DUPLEX … #define LINKEVENT_LINKSPEED_MBPS … #define LINKEVENT_LINKSPEED_ENCODED … #define AUTO_FW_RESET_ENABLED … #define AUTO_FW_RESET_DISABLED … /* firmware response header: * 63:58 - message type * 57:56 - owner * 55:53 - desc count * 52:48 - reserved * 47:40 - completion id * 39:32 - opcode * 31:16 - error code * 15:00 - reserved */ #define netxen_get_nic_msgtype(msg_hdr) … #define netxen_get_nic_msg_compid(msg_hdr) … #define netxen_get_nic_msg_opcode(msg_hdr) … #define netxen_get_nic_msg_errcode(msg_hdr) … nx_fw_msg_t; nx_nic_req_t; nx_mac_req_t; #define MAX_PENDING_DESC_BLOCK_SIZE … #define NETXEN_NIC_MSI_ENABLED … #define NETXEN_NIC_MSIX_ENABLED … #define NETXEN_NIC_LRO_ENABLED … #define NETXEN_NIC_LRO_DISABLED … #define NETXEN_NIC_BRIDGE_ENABLED … #define NETXEN_NIC_DIAG_ENABLED … #define NETXEN_FW_RESET_OWNER … #define NETXEN_FW_MSS_CAP … #define NETXEN_IS_MSI_FAMILY(adapter) … #define MSIX_ENTRIES_PER_ADAPTER … #define NETXEN_MSIX_TBL_SPACE … #define NETXEN_PCI_REG_MSIX_TBL … #define NETXEN_DB_MAPSIZE_BYTES … #define NETXEN_ADAPTER_UP_MAGIC … #define NETXEN_NIC_PEG_TUNE … #define __NX_FW_ATTACHED … #define __NX_DEV_UP … #define __NX_RESETTING … /* Mini Coredump FW supported version */ #define NX_MD_SUPPORT_MAJOR … #define NX_MD_SUPPORT_MINOR … #define NX_MD_SUPPORT_SUBVERSION … #define LSW(x) … #define LSD(x) … #define MSD(x) … /* Mini Coredump mask level */ #define NX_DUMP_MASK_MIN … #define NX_DUMP_MASK_DEF … #define NX_DUMP_MASK_MAX … /* Mini Coredump CDRP commands */ #define NX_CDRP_CMD_TEMP_SIZE … #define NX_CDRP_CMD_GET_TEMP_HDR … #define NX_DUMP_STATE_ARRAY_LEN … #define NX_DUMP_CAP_SIZE_ARRAY_LEN … /* Mini Coredump sysfs entries flags*/ #define NX_FORCE_FW_DUMP_KEY … #define NX_ENABLE_FW_DUMP … #define NX_DISABLE_FW_DUMP … #define NX_FORCE_FW_RESET … /* Flash read/write address */ #define NX_FW_DUMP_REG1 … #define NX_FW_DUMP_REG2 … #define NX_FLASH_SEM2_LK … #define NX_FLASH_SEM2_ULK … #define NX_FLASH_LOCK_ID … #define FLASH_ROM_WINDOW … #define FLASH_ROM_DATA … /* Mini Coredump register read/write routine */ #define NX_RD_DUMP_REG(addr, bar0, data) … #define NX_WR_DUMP_REG(addr, bar0, data) … /* Entry Type Defines */ #define RDNOP … #define RDCRB … #define RDMUX … #define QUEUE … #define BOARD … #define RDSRE … #define RDOCM … #define PREGS … #define L1DTG … #define L1ITG … #define CACHE … #define L1DAT … #define L1INS … #define RDSTK … #define RDCON … #define L2DTG … #define L2ITG … #define L2DAT … #define L2INS … #define RDOC3 … #define MEMBK … #define RDROM … #define RDMEM … #define RDMN … #define INFOR … #define CNTRL … #define TLHDR … #define RDEND … #define PRIMQ … #define SQG2Q … #define SQG3Q … /* * Opcodes for Control Entries. * These Flags are bit fields. */ #define NX_DUMP_WCRB … #define NX_DUMP_RWCRB … #define NX_DUMP_ANDCRB … #define NX_DUMP_ORCRB … #define NX_DUMP_POLLCRB … #define NX_DUMP_RD_SAVE … #define NX_DUMP_WRT_SAVED … #define NX_DUMP_MOD_SAVE_ST … /* Driver Flags */ #define NX_DUMP_SKIP … #define NX_DUMP_SIZE_ERR … #define NX_PCI_READ_32(ADDR) … #define NX_PCI_WRITE_32(DATA, ADDR) … struct netxen_minidump { … }; struct netxen_minidump_template_hdr { … }; /* Common Entry Header: Common to All Entry Types */ /* * Driver Code is for driver to write some info about the entry. * Currently not used. */ struct netxen_common_entry_hdr { … }; /* Generic Entry Including Header */ struct netxen_minidump_entry { … }; /* Read ROM Header */ struct netxen_minidump_entry_rdrom { … }; /* Read CRB and Control Entry Header */ struct netxen_minidump_entry_crb { … }; /* Read Memory and MN Header */ struct netxen_minidump_entry_rdmem { … }; /* Read Cache L1 and L2 Header */ struct netxen_minidump_entry_cache { … }; /* Read OCM Header */ struct netxen_minidump_entry_rdocm { … }; /* Read MUX Header */ struct netxen_minidump_entry_mux { … }; /* Read Queue Header */ struct netxen_minidump_entry_queue { … }; struct netxen_dummy_dma { … }; struct netxen_adapter { … }; int nx_fw_cmd_query_phy(struct netxen_adapter *adapter, u32 reg, u32 *val); int nx_fw_cmd_set_phy(struct netxen_adapter *adapter, u32 reg, u32 val); #define NXRD32(adapter, off) … #define NXWR32(adapter, off, val) … #define NXRDIO(adapter, addr) … #define NXWRIO(adapter, addr, val) … int netxen_pcie_sem_lock(struct netxen_adapter *, int, u32); void netxen_pcie_sem_unlock(struct netxen_adapter *, int); #define netxen_rom_lock(a) … #define netxen_rom_unlock(a) … #define netxen_phy_lock(a) … #define netxen_phy_unlock(a) … #define netxen_api_lock(a) … #define netxen_api_unlock(a) … #define netxen_sw_lock(a) … #define netxen_sw_unlock(a) … #define crb_win_lock(a) … #define crb_win_unlock(a) … int netxen_nic_get_board_info(struct netxen_adapter *adapter); int netxen_nic_wol_supported(struct netxen_adapter *adapter); /* Functions from netxen_nic_init.c */ int netxen_init_dummy_dma(struct netxen_adapter *adapter); void netxen_free_dummy_dma(struct netxen_adapter *adapter); int netxen_check_flash_fw_compatibility(struct netxen_adapter *adapter); int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val); int netxen_load_firmware(struct netxen_adapter *adapter); int netxen_need_fw_reset(struct netxen_adapter *adapter); void netxen_request_firmware(struct netxen_adapter *adapter); void netxen_release_firmware(struct netxen_adapter *adapter); int netxen_pinit_from_rom(struct netxen_adapter *adapter); int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp); int netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr, u8 *bytes, size_t size); int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr, u8 *bytes, size_t size); int netxen_flash_unlock(struct netxen_adapter *adapter); int netxen_backup_crbinit(struct netxen_adapter *adapter); int netxen_flash_erase_secondary(struct netxen_adapter *adapter); int netxen_flash_erase_primary(struct netxen_adapter *adapter); void netxen_halt_pegs(struct netxen_adapter *adapter); int netxen_rom_se(struct netxen_adapter *adapter, int addr); int netxen_alloc_sw_resources(struct netxen_adapter *adapter); void netxen_free_sw_resources(struct netxen_adapter *adapter); void netxen_setup_hwops(struct netxen_adapter *adapter); void __iomem *netxen_get_ioaddr(struct netxen_adapter *, u32); int netxen_alloc_hw_resources(struct netxen_adapter *adapter); void netxen_free_hw_resources(struct netxen_adapter *adapter); void netxen_release_rx_buffers(struct netxen_adapter *adapter); void netxen_release_tx_buffers(struct netxen_adapter *adapter); int netxen_init_firmware(struct netxen_adapter *adapter); void netxen_nic_clear_stats(struct netxen_adapter *adapter); void netxen_watchdog_task(struct work_struct *work); void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid, struct nx_host_rds_ring *rds_ring); int netxen_process_cmd_ring(struct netxen_adapter *adapter); int netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max); void netxen_p3_free_mac_list(struct netxen_adapter *adapter); int netxen_config_intr_coalesce(struct netxen_adapter *adapter); int netxen_config_rss(struct netxen_adapter *adapter, int enable); int netxen_config_ipaddr(struct netxen_adapter *adapter, __be32 ip, int cmd); int netxen_linkevent_request(struct netxen_adapter *adapter, int enable); void netxen_advert_link_change(struct netxen_adapter *adapter, int linkup); void netxen_pci_camqm_read_2M(struct netxen_adapter *, u64, u64 *); void netxen_pci_camqm_write_2M(struct netxen_adapter *, u64, u64); int nx_fw_cmd_set_gbe_port(struct netxen_adapter *adapter, u32 speed, u32 duplex, u32 autoneg); int nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, int mtu); int netxen_nic_change_mtu(struct net_device *netdev, int new_mtu); int netxen_config_hw_lro(struct netxen_adapter *adapter, int enable); int netxen_config_bridged_mode(struct netxen_adapter *adapter, int enable); int netxen_send_lro_cleanup(struct netxen_adapter *adapter); int netxen_setup_minidump(struct netxen_adapter *adapter); void netxen_dump_fw(struct netxen_adapter *adapter); void netxen_nic_update_cmd_producer(struct netxen_adapter *adapter, struct nx_host_tx_ring *tx_ring); /* Functions from netxen_nic_main.c */ int netxen_nic_reset_context(struct netxen_adapter *); int nx_dev_request_reset(struct netxen_adapter *adapter); /* * NetXen Board information */ #define NETXEN_MAX_SHORT_NAME … struct netxen_brdinfo { … }; struct netxen_dimm_cfg { … }; static const struct netxen_brdinfo netxen_boards[] = …; #define NUM_SUPPORTED_BOARDS … static inline int netxen_nic_get_brd_name_by_type(u32 type, char *name) { … } static inline u32 netxen_tx_avail(struct nx_host_tx_ring *tx_ring) { … } int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, u64 *mac); int netxen_p3_get_mac_addr(struct netxen_adapter *adapter, u64 *mac); void netxen_change_ringparam(struct netxen_adapter *adapter); extern const struct ethtool_ops netxen_nic_ethtool_ops; #endif /* __NETXEN_NIC_H_ */
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