linux/drivers/net/ethernet/renesas/rswitch.h

/* SPDX-License-Identifier: GPL-2.0 */
/* Renesas Ethernet Switch device driver
 *
 * Copyright (C) 2022 Renesas Electronics Corporation
 */

#ifndef __RSWITCH_H__
#define __RSWITCH_H__

#include <linux/platform_device.h>
#include "rcar_gen4_ptp.h"

#define RSWITCH_MAX_NUM_QUEUES …

#define RSWITCH_NUM_PORTS …
#define rswitch_for_each_enabled_port(priv, i) …

#define rswitch_for_each_enabled_port_continue_reverse(priv, i) …

#define TX_RING_SIZE …
#define RX_RING_SIZE …
#define TS_RING_SIZE …

#define RSWITCH_MAX_MTU …
#define RSWITCH_HEADROOM …
#define RSWITCH_DESC_BUF_SIZE …
#define RSWITCH_TAILROOM …
#define RSWITCH_ALIGN …
#define RSWITCH_BUF_SIZE …
#define RSWITCH_MAP_BUF_SIZE …
#define RSWITCH_MAX_CTAG_PCP …

#define RSWITCH_TIMEOUT_US …

#define RSWITCH_TOP_OFFSET …
#define RSWITCH_COMA_OFFSET …
#define RSWITCH_ETHA_OFFSET …
#define RSWITCH_ETHA_SIZE …
#define RSWITCH_GWCA0_OFFSET …
#define RSWITCH_GWCA1_OFFSET …

/* TODO: hardcoded ETHA/GWCA settings for now */
#define GWCA_IRQ_RESOURCE_NAME …
#define GWCA_IRQ_NAME …
#define GWCA_NUM_IRQS …
#define GWCA_INDEX …
#define AGENT_INDEX_GWCA …
#define GWCA_IPV_NUM …
#define GWRO …

#define GWCA_TS_IRQ_RESOURCE_NAME …
#define GWCA_TS_IRQ_NAME …
#define GWCA_TS_IRQ_BIT …

#define FWRO …
#define TPRO …
#define CARO …
#define TARO …
#define RMRO …
enum rswitch_reg { … };

/* ETHA/RMAC */
enum rswitch_etha_mode { … };

#define EAMS_OPS_MASK …

#define EAVCC_VEM_SC_TAG …

#define MPIC_PIS_MII …
#define MPIC_PIS_GMII …
#define MPIC_PIS_XGMII …
#define MPIC_LSC_SHIFT …
#define MPIC_LSC_100M …
#define MPIC_LSC_1G …
#define MPIC_LSC_2_5G …

#define MDIO_READ_C45 …
#define MDIO_WRITE_C45 …

#define MPSM_PSME …
#define MPSM_MFF_C45 …
#define MPSM_PRD_SHIFT …
#define MPSM_PRD_MASK …

/* Completion flags */
#define MMIS1_PAACS …
#define MMIS1_PWACS …
#define MMIS1_PRACS …
#define MMIS1_CLEAR_FLAGS …

#define MPIC_PSMCS_SHIFT …
#define MPIC_PSMCS_MASK …
#define MPIC_PSMCS(val) …

#define MPIC_PSMHT_SHIFT …
#define MPIC_PSMHT_MASK …
#define MPIC_PSMHT(val) …

#define MLVC_PLV …

/* GWCA */
enum rswitch_gwca_mode { … };

#define GWMS_OPS_MASK …

#define GWMTIRM_MTIOG …
#define GWMTIRM_MTR …

#define GWVCC_VEM_SC_TAG …

#define GWARIRM_ARIOG …
#define GWARIRM_ARR …

#define GWMDNC_TSDMN(num) …
#define GWMDNC_TXDMN(num) …
#define GWMDNC_RXDMN(num) …

#define GWDCC_BALR …
#define GWDCC_DCP_MASK …
#define GWDCC_DCP(prio) …
#define GWDCC_DQT …
#define GWDCC_ETS …
#define GWDCC_EDE …

#define GWTRC(queue) …
#define GWTPC_PPPL(ipv) …
#define GWDCC_OFFS(queue) …

#define GWDIS(i) …
#define GWDIE(i) …
#define GWDID(i) …

/* COMA */
#define RRC_RR …
#define RRC_RR_CLR …
#define RCEC_ACE_DEFAULT …
#define RCEC_RCE …
#define RCDC_RCD …

#define CABPIRM_BPIOG …
#define CABPIRM_BPR …

#define CABPPFLC_INIT_VALUE …

/* MFWD */
#define FWPC0_LTHTA …
#define FWPC0_IP4UE …
#define FWPC0_IP4TE …
#define FWPC0_IP4OE …
#define FWPC0_L2SE …
#define FWPC0_IP4EA …
#define FWPC0_IPDSA …
#define FWPC0_IPHLA …
#define FWPC0_MACSDA …
#define FWPC0_MACHLA …
#define FWPC0_MACHMA …
#define FWPC0_VLANSA …

#define FWPC0(i) …
#define FWPC0_DEFAULT …
#define FWPC1(i) …
#define FWPC1_DDE …

#define FWPBFC(i) …

#define FWPBFCSDC(j, i) …

/* TOP */
#define TPEMIMC7(queue) …

/* Descriptors */
enum RX_DS_CC_BIT { … };

enum TX_DS_TAGL_BIT { … };

enum DIE_DT { … };

/* Both transmission and reception */
#define INFO1_FMT …
#define INFO1_TXC …

/* For transmission */
#define INFO1_TSUN(val) …
#define INFO1_IPV(prio) …
#define INFO1_CSD0(index) …
#define INFO1_CSD1(index) …
#define INFO1_DV(port_vector) …

/* For reception */
#define INFO1_SPN(port) …

/* For timestamp descriptor in dptrl (Byte 4 to 7) */
#define TS_DESC_TSUN(dptrl) …
#define TS_DESC_SPN(dptrl) …
#define TS_DESC_DPN(dptrl) …
#define TS_DESC_TN(dptrl) …

struct rswitch_desc { … } __packed;

struct rswitch_ts_desc { … } __packed;

struct rswitch_ext_desc { … } __packed;

struct rswitch_ext_ts_desc { … } __packed;

struct rswitch_etha { … };

/* The datasheet said descriptor "chain" and/or "queue". For consistency of
 * name, this driver calls "queue".
 */
struct rswitch_gwca_queue { … };

struct rswitch_gwca_ts_info { … };

#define RSWITCH_NUM_IRQ_REGS …
struct rswitch_gwca { … };

#define NUM_QUEUES_PER_NDEV …
struct rswitch_device { … };

struct rswitch_mfwd_mac_table_entry { … };

struct rswitch_mfwd { … };

struct rswitch_private { … };

#endif	/* #ifndef __RSWITCH_H__ */