linux/drivers/net/ethernet/sis/sis900.h

/* SPDX-License-Identifier: GPL-2.0 */
/* sis900.h Definitions for SiS ethernet controllers including 7014/7016 and 900
 * Copyright 1999 Silicon Integrated System Corporation
 * References:
 *   SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
 *	preliminary Rev. 1.0 Jan. 14, 1998
 *   SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
 *	preliminary Rev. 1.0 Nov. 10, 1998
 *   SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
 *	preliminary Rev. 1.0 Jan. 18, 1998
 *   http://www.sis.com.tw/support/databook.htm
 */

/*
 * SiS 7016 and SiS 900 ethernet controller registers
 */

/* The I/O extent, SiS 900 needs 256 bytes of io address */
#define SIS900_TOTAL_SIZE

/* Symbolic offsets to registers. */
enum sis900_registers {};

/* Symbolic names for bits in various registers */
enum sis900_command_register_bits {};

enum sis900_configuration_register_bits {};

enum sis900_eeprom_access_register_bits {};

enum sis900_interrupt_register_bits {};

enum sis900_interrupt_enable_register_bits {};

/* maximum dma burst for transmission and receive */
#define MAX_DMA_RANGE
#define TxMXDMA_shift
#define RxMXDMA_shift

enum sis900_tx_rx_dma{};

/* transmit FIFO thresholds */
#define TX_FILL_THRESH
#define TxFILLT_shift
#define TxDRNT_shift
#define TxDRNT_100
#define TxDRNT_10

enum sis900_transmit_config_register_bits {};

/* recevie FIFO thresholds */
#define RxDRNT_shift
#define RxDRNT_100
#define RxDRNT_10

enum sis900_reveive_config_register_bits {};

#define RFAA_shift
#define RFADDR_shift

enum sis900_receive_filter_control_register_bits {};

enum sis900_reveive_filter_data_mask {};

/* EEPROM Addresses */
enum sis900_eeprom_address {};

/* The EEPROM commands include the alway-set leading bit. Refer to NM93Cxx datasheet */
enum sis900_eeprom_command {};

/* For SiS962 or SiS963, request the eeprom software access */
enum sis96x_eeprom_command {};

/* PCI Registers */
enum sis900_pci_registers {};

/* Power management capabilities bits */
enum sis900_cfgpmc_register_bits {};

enum sis900_pmesp_bits {};

/* Power management control/status bits */
enum sis900_cfgpmcsr_register_bits {};

/* Wake-on-LAN support. */
enum sis900_power_management_control_register_bits {};

/* Management Data I/O (mdio) frame */
#define MIIread
#define MIIwrite
#define MIIpmdShift
#define MIIregShift
#define MIIcmdLen
#define MIIcmdShift

/* Buffer Descriptor Status*/
enum sis900_buffer_status {};
/* Status for TX Buffers */
enum sis900_tx_buffer_status {};

enum sis900_rx_buffer_status {};

/* MII register offsets */
enum mii_registers {};

/* mii registers specific to SiS 900 */
enum sis_mii_registers {};

/* mii registers specific to ICS 1893 */
enum ics_mii_registers {};

/* mii registers specific to AMD 79C901 */
enum amd_mii_registers {};

/* MII Control register bit definitions. */
enum mii_control_register_bits {};

/* MII Status register bit  */
enum mii_status_register_bits {};

#define MII_ID1_OUI_LO
#define MII_ID1_MODEL
#define MII_ID1_REV

/* MII NWAY Register Bits ...
   valid for the ANAR (Auto-Negotiation Advertisement) and
   ANLPAR (Auto-Negotiation Link Partner) registers */
enum mii_nway_register_bits {};

enum mii_stsout_register_bits {};

enum mii_stsics_register_bits {};

enum mii_stssum_register_bits {};

enum sis900_revision_id {};

enum sis630_revision_id {};

#define FDX_CAPABLE_DUPLEX_UNKNOWN
#define FDX_CAPABLE_HALF_SELECTED
#define FDX_CAPABLE_FULL_SELECTED

#define HW_SPEED_UNCONFIG
#define HW_SPEED_HOME
#define HW_SPEED_10_MBPS
#define HW_SPEED_100_MBPS
#define HW_SPEED_DEFAULT

#define CRC_SIZE
#define MAC_HEADER_SIZE

#if IS_ENABLED(CONFIG_VLAN_8021Q)
#define MAX_FRAME_SIZE
#else
#define MAX_FRAME_SIZE
#endif /* CONFIG_VLAN_802_1Q */

#define TX_BUF_SIZE
#define RX_BUF_SIZE

#define NUM_TX_DESC
#define NUM_RX_DESC
#define TX_TOTAL_SIZE
#define RX_TOTAL_SIZE

/* PCI stuff, should be move to pci.h */
#define SIS630_VENDOR_ID
#define SIS630_DEVICE_ID