#ifndef __DWMAC5_H__
#define __DWMAC5_H__
#define MAC_DPP_FSM_INT_STATUS …
#define MAC_AXI_SLV_DPE_ADDR_STATUS …
#define MAC_FSM_CONTROL …
#define PRTYEN …
#define TMOUTEN …
#define MAC_FPE_CTRL_STS …
#define TRSP …
#define TVER …
#define RRSP …
#define RVER …
#define SRSP …
#define SVER …
#define EFPE …
#define MAC_PPS_CONTROL …
#define PPS_MAXIDX(x) …
#define PPS_MINIDX(x) …
#define PPSx_MASK(x) …
#define MCGRENx(x) …
#define TRGTMODSELx(x, val) …
#define PPSCMDx(x, val) …
#define PPSEN0 …
#define MAC_PPSx_TARGET_TIME_SEC(x) …
#define MAC_PPSx_TARGET_TIME_NSEC(x) …
#define TRGTBUSY0 …
#define TTSL0 …
#define MAC_PPSx_INTERVAL(x) …
#define MAC_PPSx_WIDTH(x) …
#define MTL_RXP_CONTROL_STATUS …
#define RXPI …
#define NPE …
#define NVE …
#define MTL_RXP_IACC_CTRL_STATUS …
#define STARTBUSY …
#define RXPEIEC …
#define RXPEIEE …
#define WRRDN …
#define ADDR …
#define MTL_RXP_IACC_DATA …
#define MTL_ECC_CONTROL …
#define MEEAO …
#define TSOEE …
#define MRXPEE …
#define MESTEE …
#define MRXEE …
#define MTXEE …
#define MTL_SAFETY_INT_STATUS …
#define MCSIS …
#define MEUIS …
#define MECIS …
#define MTL_ECC_INT_ENABLE …
#define RPCEIE …
#define ECEIE …
#define RXCEIE …
#define TXCEIE …
#define MTL_ECC_INT_STATUS …
#define MTL_DPP_CONTROL …
#define EPSI …
#define OPE …
#define EDPP …
#define DMA_SAFETY_INT_STATUS …
#define MSUIS …
#define MSCIS …
#define DEUIS …
#define DECIS …
#define DMA_ECC_INT_ENABLE …
#define TCEIE …
#define DMA_ECC_INT_STATUS …
#define GMAC_RXQ_CTRL4 …
#define GMAC_RXQCTRL_VFFQ_MASK …
#define GMAC_RXQCTRL_VFFQ_SHIFT …
#define GMAC_RXQCTRL_VFFQE …
#define GMAC_INT_FPE_EN …
int dwmac5_safety_feat_config(void __iomem *ioaddr, unsigned int asp,
struct stmmac_safety_feature_cfg *safety_cfg);
int dwmac5_safety_feat_irq_status(struct net_device *ndev,
void __iomem *ioaddr, unsigned int asp,
struct stmmac_safety_stats *stats);
int dwmac5_safety_feat_dump(struct stmmac_safety_stats *stats,
int index, unsigned long *count, const char **desc);
int dwmac5_rxp_config(void __iomem *ioaddr, struct stmmac_tc_entry *entries,
unsigned int count);
int dwmac5_flex_pps_config(void __iomem *ioaddr, int index,
struct stmmac_pps_cfg *cfg, bool enable,
u32 sub_second_inc, u32 systime_flags);
void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg,
u32 num_txq, u32 num_rxq,
bool enable);
void dwmac5_fpe_send_mpacket(void __iomem *ioaddr,
struct stmmac_fpe_cfg *cfg,
enum stmmac_mpacket_type type);
int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev);
#endif