linux/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * This is the driver for the GMAC on-chip Ethernet controller for ST SoCs.
 * DWC Ether MAC version 4.xx  has been used for  developing this code.
 *
 * This contains the functions to handle the dma.
 *
 * Copyright (C) 2015  STMicroelectronics Ltd
 *
 * Author: Alexandre Torgue <[email protected]>
 */

#include <linux/io.h>
#include "dwmac4.h"
#include "dwmac4_dma.h"
#include "stmmac.h"

static void dwmac4_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi)
{ … }

static void dwmac4_dma_init_rx_chan(struct stmmac_priv *priv,
				    void __iomem *ioaddr,
				    struct stmmac_dma_cfg *dma_cfg,
				    dma_addr_t dma_rx_phy, u32 chan)
{ … }

static void dwmac4_dma_init_tx_chan(struct stmmac_priv *priv,
				    void __iomem *ioaddr,
				    struct stmmac_dma_cfg *dma_cfg,
				    dma_addr_t dma_tx_phy, u32 chan)
{ … }

static void dwmac4_dma_init_channel(struct stmmac_priv *priv,
				    void __iomem *ioaddr,
				    struct stmmac_dma_cfg *dma_cfg, u32 chan)
{ … }

static void dwmac410_dma_init_channel(struct stmmac_priv *priv,
				      void __iomem *ioaddr,
				      struct stmmac_dma_cfg *dma_cfg, u32 chan)
{ … }

static void dwmac4_dma_init(void __iomem *ioaddr,
			    struct stmmac_dma_cfg *dma_cfg, int atds)
{ … }

static void _dwmac4_dump_dma_regs(struct stmmac_priv *priv,
				  void __iomem *ioaddr, u32 channel,
				  u32 *reg_space)
{ … }

static void dwmac4_dump_dma_regs(struct stmmac_priv *priv, void __iomem *ioaddr,
				 u32 *reg_space)
{ … }

static void dwmac4_rx_watchdog(struct stmmac_priv *priv, void __iomem *ioaddr,
			       u32 riwt, u32 queue)
{ … }

static void dwmac4_dma_rx_chan_op_mode(struct stmmac_priv *priv,
				       void __iomem *ioaddr, int mode,
				       u32 channel, int fifosz, u8 qmode)
{ … }

static void dwmac4_dma_tx_chan_op_mode(struct stmmac_priv *priv,
				       void __iomem *ioaddr, int mode,
				       u32 channel, int fifosz, u8 qmode)
{ … }

static int dwmac4_get_hw_feature(void __iomem *ioaddr,
				 struct dma_features *dma_cap)
{ … }

/* Enable/disable TSO feature and set MSS */
static void dwmac4_enable_tso(struct stmmac_priv *priv, void __iomem *ioaddr,
			      bool en, u32 chan)
{ … }

static void dwmac4_qmode(struct stmmac_priv *priv, void __iomem *ioaddr,
			 u32 channel, u8 qmode)
{ … }

static void dwmac4_set_bfsize(struct stmmac_priv *priv, void __iomem *ioaddr,
			      int bfsize, u32 chan)
{ … }

static void dwmac4_enable_sph(struct stmmac_priv *priv, void __iomem *ioaddr,
			      bool en, u32 chan)
{ … }

static int dwmac4_enable_tbs(struct stmmac_priv *priv, void __iomem *ioaddr,
			     bool en, u32 chan)
{ … }

const struct stmmac_dma_ops dwmac4_dma_ops = …;

const struct stmmac_dma_ops dwmac410_dma_ops = …;