linux/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Copyright (c) 2018 Synopsys, Inc. and/or its affiliates.
 * stmmac XGMAC support.
 */

#include <linux/iopoll.h>
#include "stmmac.h"
#include "dwxgmac2.h"

static int dwxgmac2_dma_reset(void __iomem *ioaddr)
{ … }

static void dwxgmac2_dma_init(void __iomem *ioaddr,
			      struct stmmac_dma_cfg *dma_cfg, int atds)
{ … }

static void dwxgmac2_dma_init_chan(struct stmmac_priv *priv,
				   void __iomem *ioaddr,
				   struct stmmac_dma_cfg *dma_cfg, u32 chan)
{ … }

static void dwxgmac2_dma_init_rx_chan(struct stmmac_priv *priv,
				      void __iomem *ioaddr,
				      struct stmmac_dma_cfg *dma_cfg,
				      dma_addr_t phy, u32 chan)
{ … }

static void dwxgmac2_dma_init_tx_chan(struct stmmac_priv *priv,
				      void __iomem *ioaddr,
				      struct stmmac_dma_cfg *dma_cfg,
				      dma_addr_t phy, u32 chan)
{ … }

static void dwxgmac2_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi)
{ … }

static void dwxgmac2_dma_dump_regs(struct stmmac_priv *priv,
				   void __iomem *ioaddr, u32 *reg_space)
{ … }

static void dwxgmac2_dma_rx_mode(struct stmmac_priv *priv, void __iomem *ioaddr,
				 int mode, u32 channel, int fifosz, u8 qmode)
{ … }

static void dwxgmac2_dma_tx_mode(struct stmmac_priv *priv, void __iomem *ioaddr,
				 int mode, u32 channel, int fifosz, u8 qmode)
{ … }

static void dwxgmac2_enable_dma_irq(struct stmmac_priv *priv,
				    void __iomem *ioaddr, u32 chan,
				    bool rx, bool tx)
{ … }

static void dwxgmac2_disable_dma_irq(struct stmmac_priv *priv,
				     void __iomem *ioaddr, u32 chan,
				     bool rx, bool tx)
{ … }

static void dwxgmac2_dma_start_tx(struct stmmac_priv *priv,
				  void __iomem *ioaddr, u32 chan)
{ … }

static void dwxgmac2_dma_stop_tx(struct stmmac_priv *priv, void __iomem *ioaddr,
				 u32 chan)
{ … }

static void dwxgmac2_dma_start_rx(struct stmmac_priv *priv,
				  void __iomem *ioaddr, u32 chan)
{ … }

static void dwxgmac2_dma_stop_rx(struct stmmac_priv *priv, void __iomem *ioaddr,
				 u32 chan)
{ … }

static int dwxgmac2_dma_interrupt(struct stmmac_priv *priv,
				  void __iomem *ioaddr,
				  struct stmmac_extra_stats *x, u32 chan,
				  u32 dir)
{ … }

static int dwxgmac2_get_hw_feature(void __iomem *ioaddr,
				   struct dma_features *dma_cap)
{ … }

static void dwxgmac2_rx_watchdog(struct stmmac_priv *priv, void __iomem *ioaddr,
				 u32 riwt, u32 queue)
{ … }

static void dwxgmac2_set_rx_ring_len(struct stmmac_priv *priv,
				     void __iomem *ioaddr, u32 len, u32 chan)
{ … }

static void dwxgmac2_set_tx_ring_len(struct stmmac_priv *priv,
				     void __iomem *ioaddr, u32 len, u32 chan)
{ … }

static void dwxgmac2_set_rx_tail_ptr(struct stmmac_priv *priv,
				     void __iomem *ioaddr, u32 ptr, u32 chan)
{ … }

static void dwxgmac2_set_tx_tail_ptr(struct stmmac_priv *priv,
				     void __iomem *ioaddr, u32 ptr, u32 chan)
{ … }

static void dwxgmac2_enable_tso(struct stmmac_priv *priv, void __iomem *ioaddr,
				bool en, u32 chan)
{ … }

static void dwxgmac2_qmode(struct stmmac_priv *priv, void __iomem *ioaddr,
			   u32 channel, u8 qmode)
{ … }

static void dwxgmac2_set_bfsize(struct stmmac_priv *priv, void __iomem *ioaddr,
				int bfsize, u32 chan)
{ … }

static void dwxgmac2_enable_sph(struct stmmac_priv *priv, void __iomem *ioaddr,
				bool en, u32 chan)
{ … }

static int dwxgmac2_enable_tbs(struct stmmac_priv *priv, void __iomem *ioaddr,
			       bool en, u32 chan)
{ … }

const struct stmmac_dma_ops dwxgmac210_dma_ops = …;