#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/phy.h>
#include <linux/regmap.h>
#include <linux/clk.h>
#include <linux/reset.h>
#include <linux/of_net.h>
#include <linux/mfd/syscon.h>
#include <linux/stmmac.h>
#include <linux/of_mdio.h>
#include <linux/module.h>
#include <linux/sys_soc.h>
#include <linux/bitfield.h>
#include "stmmac_platform.h"
#define NSS_COMMON_CLK_GATE …
#define NSS_COMMON_CLK_GATE_PTP_EN(x) …
#define NSS_COMMON_CLK_GATE_RGMII_RX_EN(x) …
#define NSS_COMMON_CLK_GATE_RGMII_TX_EN(x) …
#define NSS_COMMON_CLK_GATE_GMII_RX_EN(x) …
#define NSS_COMMON_CLK_GATE_GMII_TX_EN(x) …
#define NSS_COMMON_CLK_DIV0 …
#define NSS_COMMON_CLK_DIV_OFFSET(x) …
#define NSS_COMMON_CLK_DIV_MASK …
#define NSS_COMMON_CLK_SRC_CTRL …
#define NSS_COMMON_CLK_SRC_CTRL_OFFSET(x) …
#define NSS_COMMON_CLK_SRC_CTRL_RGMII(x) …
#define NSS_COMMON_CLK_SRC_CTRL_SGMII(x) …
#define NSS_COMMON_GMAC_CTL(x) …
#define NSS_COMMON_GMAC_CTL_CSYS_REQ …
#define NSS_COMMON_GMAC_CTL_PHY_IFACE_SEL …
#define NSS_COMMON_GMAC_CTL_IFG_LIMIT_OFFSET …
#define NSS_COMMON_GMAC_CTL_IFG_OFFSET …
#define NSS_COMMON_CLK_DIV_RGMII_1000 …
#define NSS_COMMON_CLK_DIV_RGMII_100 …
#define NSS_COMMON_CLK_DIV_RGMII_10 …
#define NSS_COMMON_CLK_DIV_SGMII_1000 …
#define NSS_COMMON_CLK_DIV_SGMII_100 …
#define NSS_COMMON_CLK_DIV_SGMII_10 …
#define QSGMII_PCS_ALL_CH_CTL …
#define QSGMII_PCS_CH_SPEED_FORCE …
#define QSGMII_PCS_CH_SPEED_10 …
#define QSGMII_PCS_CH_SPEED_100 …
#define QSGMII_PCS_CH_SPEED_1000 …
#define QSGMII_PCS_CH_SPEED_MASK …
#define QSGMII_PCS_CH_SPEED_SHIFT(x) …
#define QSGMII_PCS_CAL_LCKDT_CTL …
#define QSGMII_PCS_CAL_LCKDT_CTL_RST …
#define QSGMII_PHY_SGMII_CTL(x) …
#define QSGMII_PHY_CDR_EN …
#define QSGMII_PHY_RX_FRONT_EN …
#define QSGMII_PHY_RX_SIGNAL_DETECT_EN …
#define QSGMII_PHY_TX_DRIVER_EN …
#define QSGMII_PHY_QSGMII_EN …
#define QSGMII_PHY_DEEMPHASIS_LVL_MASK …
#define QSGMII_PHY_DEEMPHASIS_LVL(x) …
#define QSGMII_PHY_PHASE_LOOP_GAIN_MASK …
#define QSGMII_PHY_PHASE_LOOP_GAIN(x) …
#define QSGMII_PHY_RX_DC_BIAS_MASK …
#define QSGMII_PHY_RX_DC_BIAS(x) …
#define QSGMII_PHY_RX_INPUT_EQU_MASK …
#define QSGMII_PHY_RX_INPUT_EQU(x) …
#define QSGMII_PHY_CDR_PI_SLEW_MASK …
#define QSGMII_PHY_CDR_PI_SLEW(x) …
#define QSGMII_PHY_TX_SLEW_MASK …
#define QSGMII_PHY_TX_SLEW(x) …
#define QSGMII_PHY_TX_DRV_AMP_MASK …
#define QSGMII_PHY_TX_DRV_AMP(x) …
struct ipq806x_gmac { … };
static int get_clk_div_sgmii(struct ipq806x_gmac *gmac, unsigned int speed)
{ … }
static int get_clk_div_rgmii(struct ipq806x_gmac *gmac, unsigned int speed)
{ … }
static int ipq806x_gmac_set_speed(struct ipq806x_gmac *gmac, unsigned int speed)
{ … }
static int ipq806x_gmac_of_parse(struct ipq806x_gmac *gmac)
{ … }
static void ipq806x_gmac_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)
{ … }
static int
ipq806x_gmac_configure_qsgmii_pcs_speed(struct ipq806x_gmac *gmac)
{ … }
static const struct soc_device_attribute ipq806x_gmac_soc_v1[] = …;
static int
ipq806x_gmac_configure_qsgmii_params(struct ipq806x_gmac *gmac)
{ … }
static int ipq806x_gmac_probe(struct platform_device *pdev)
{ … }
static const struct of_device_id ipq806x_gmac_dwmac_match[] = …;
MODULE_DEVICE_TABLE(of, ipq806x_gmac_dwmac_match);
static struct platform_driver ipq806x_gmac_dwmac_driver = …;
module_platform_driver(…) …;
MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;