/* SPDX-License-Identifier: GPL-2.0 */ /* $Id: sunhme.h,v 1.33 2001/08/03 06:23:04 davem Exp $ * sunhme.h: Definitions for Sparc HME/BigMac 10/100baseT ethernet driver. * Also known as the "Happy Meal". * * Copyright (C) 1996, 1999 David S. Miller ([email protected]) */ #ifndef _SUNHME_H #define _SUNHME_H #include <linux/pci.h> /* Happy Meal global registers. */ #define GREG_SWRESET … #define GREG_CFG … #define GREG_STAT … #define GREG_IMASK … #define GREG_REG_SIZE … /* Global reset register. */ #define GREG_RESET_ETX … #define GREG_RESET_ERX … #define GREG_RESET_ALL … /* Global config register. */ #define GREG_CFG_BURSTMSK … #define GREG_CFG_BURST16 … #define GREG_CFG_BURST32 … #define GREG_CFG_BURST64 … #define GREG_CFG_64BIT … #define GREG_CFG_PARITY … #define GREG_CFG_RESV … /* Global status register. */ #define GREG_STAT_GOTFRAME … #define GREG_STAT_RCNTEXP … #define GREG_STAT_ACNTEXP … #define GREG_STAT_CCNTEXP … #define GREG_STAT_LCNTEXP … #define GREG_STAT_RFIFOVF … #define GREG_STAT_CVCNTEXP … #define GREG_STAT_STSTERR … #define GREG_STAT_SENTFRAME … #define GREG_STAT_TFIFO_UND … #define GREG_STAT_MAXPKTERR … #define GREG_STAT_NCNTEXP … #define GREG_STAT_ECNTEXP … #define GREG_STAT_LCCNTEXP … #define GREG_STAT_FCNTEXP … #define GREG_STAT_DTIMEXP … #define GREG_STAT_RXTOHOST … #define GREG_STAT_NORXD … #define GREG_STAT_RXERR … #define GREG_STAT_RXLATERR … #define GREG_STAT_RXPERR … #define GREG_STAT_RXTERR … #define GREG_STAT_EOPERR … #define GREG_STAT_MIFIRQ … #define GREG_STAT_HOSTTOTX … #define GREG_STAT_TXALL … #define GREG_STAT_TXEACK … #define GREG_STAT_TXLERR … #define GREG_STAT_TXPERR … #define GREG_STAT_TXTERR … #define GREG_STAT_SLVERR … #define GREG_STAT_SLVPERR … /* All interesting error conditions. */ #define GREG_STAT_ERRORS … /* Global interrupt mask register. */ #define GREG_IMASK_GOTFRAME … #define GREG_IMASK_RCNTEXP … #define GREG_IMASK_ACNTEXP … #define GREG_IMASK_CCNTEXP … #define GREG_IMASK_LCNTEXP … #define GREG_IMASK_RFIFOVF … #define GREG_IMASK_CVCNTEXP … #define GREG_IMASK_STSTERR … #define GREG_IMASK_SENTFRAME … #define GREG_IMASK_TFIFO_UND … #define GREG_IMASK_MAXPKTERR … #define GREG_IMASK_NCNTEXP … #define GREG_IMASK_ECNTEXP … #define GREG_IMASK_LCCNTEXP … #define GREG_IMASK_FCNTEXP … #define GREG_IMASK_DTIMEXP … #define GREG_IMASK_RXTOHOST … #define GREG_IMASK_NORXD … #define GREG_IMASK_RXERR … #define GREG_IMASK_RXLATERR … #define GREG_IMASK_RXPERR … #define GREG_IMASK_RXTERR … #define GREG_IMASK_EOPERR … #define GREG_IMASK_MIFIRQ … #define GREG_IMASK_HOSTTOTX … #define GREG_IMASK_TXALL … #define GREG_IMASK_TXEACK … #define GREG_IMASK_TXLERR … #define GREG_IMASK_TXPERR … #define GREG_IMASK_TXTERR … #define GREG_IMASK_SLVERR … #define GREG_IMASK_SLVPERR … /* Happy Meal external transmitter registers. */ #define ETX_PENDING … #define ETX_CFG … #define ETX_RING … #define ETX_BBASE … #define ETX_BDISP … #define ETX_FIFOWPTR … #define ETX_FIFOSWPTR … #define ETX_FIFORPTR … #define ETX_FIFOSRPTR … #define ETX_FIFOPCNT … #define ETX_SMACHINE … #define ETX_RSIZE … #define ETX_BPTR … #define ETX_REG_SIZE … /* ETX transmit pending register. */ #define ETX_TP_DMAWAKEUP … /* ETX config register. */ #define ETX_CFG_DMAENABLE … #define ETX_CFG_FIFOTHRESH … #define ETX_CFG_IRQDAFTER … #define ETX_CFG_IRQDBEFORE … #define ETX_RSIZE_SHIFT … /* Happy Meal external receiver registers. */ #define ERX_CFG … #define ERX_RING … #define ERX_BPTR … #define ERX_FIFOWPTR … #define ERX_FIFOSWPTR … #define ERX_FIFORPTR … #define ERX_FIFOSRPTR … #define ERX_SMACHINE … #define ERX_REG_SIZE … /* ERX config register. */ #define ERX_CFG_DMAENABLE … #define ERX_CFG_RESV1 … #define ERX_CFG_BYTEOFFSET … #define ERX_CFG_RESV2 … #define ERX_CFG_SIZE32 … #define ERX_CFG_SIZE64 … #define ERX_CFG_SIZE128 … #define ERX_CFG_SIZE256 … #define ERX_CFG_RESV3 … #define ERX_CFG_CSUMSTART … /* I'd like a Big Mac, small fries, small coke, and SparcLinux please. */ #define BMAC_XIFCFG … /* 0x4-->0x204, reserved */ #define BMAC_TXSWRESET … #define BMAC_TXCFG … #define BMAC_IGAP1 … #define BMAC_IGAP2 … #define BMAC_ALIMIT … #define BMAC_STIME … #define BMAC_PLEN … #define BMAC_PPAT … #define BMAC_TXSDELIM … #define BMAC_JSIZE … #define BMAC_TXMAX … #define BMAC_TXMIN … #define BMAC_PATTEMPT … #define BMAC_DTCTR … #define BMAC_NCCTR … #define BMAC_FCCTR … #define BMAC_EXCTR … #define BMAC_LTCTR … #define BMAC_RSEED … #define BMAC_TXSMACHINE … /* 0x258-->0x304, reserved */ #define BMAC_RXSWRESET … #define BMAC_RXCFG … #define BMAC_RXMAX … #define BMAC_RXMIN … #define BMAC_MACADDR2 … #define BMAC_MACADDR1 … #define BMAC_MACADDR0 … #define BMAC_FRCTR … #define BMAC_GLECTR … #define BMAC_UNALECTR … #define BMAC_RCRCECTR … #define BMAC_RXSMACHINE … #define BMAC_RXCVALID … /* 0x33c, reserved */ #define BMAC_HTABLE3 … #define BMAC_HTABLE2 … #define BMAC_HTABLE1 … #define BMAC_HTABLE0 … #define BMAC_AFILTER2 … #define BMAC_AFILTER1 … #define BMAC_AFILTER0 … #define BMAC_AFMASK … #define BMAC_REG_SIZE … /* BigMac XIF config register. */ #define BIGMAC_XCFG_ODENABLE … #define BIGMAC_XCFG_XLBACK … #define BIGMAC_XCFG_MLBACK … #define BIGMAC_XCFG_MIIDISAB … #define BIGMAC_XCFG_SQENABLE … #define BIGMAC_XCFG_SQETWIN … #define BIGMAC_XCFG_LANCE … #define BIGMAC_XCFG_LIPG0 … /* BigMac transmit config register. */ #define BIGMAC_TXCFG_ENABLE … #define BIGMAC_TXCFG_SMODE … #define BIGMAC_TXCFG_CIGN … #define BIGMAC_TXCFG_FCSOFF … #define BIGMAC_TXCFG_DBACKOFF … #define BIGMAC_TXCFG_FULLDPLX … #define BIGMAC_TXCFG_DGIVEUP … /* BigMac receive config register. */ #define BIGMAC_RXCFG_ENABLE … #define BIGMAC_RXCFG_PSTRIP … #define BIGMAC_RXCFG_PMISC … #define BIGMAC_RXCFG_DERR … #define BIGMAC_RXCFG_DCRCS … #define BIGMAC_RXCFG_REJME … #define BIGMAC_RXCFG_PGRP … #define BIGMAC_RXCFG_HENABLE … #define BIGMAC_RXCFG_AENABLE … /* These are the "Management Interface" (ie. MIF) registers of the transceiver. */ #define TCVR_BBCLOCK … #define TCVR_BBDATA … #define TCVR_BBOENAB … #define TCVR_FRAME … #define TCVR_CFG … #define TCVR_IMASK … #define TCVR_STATUS … #define TCVR_SMACHINE … #define TCVR_REG_SIZE … /* Frame commands. */ #define FRAME_WRITE … #define FRAME_READ … /* Transceiver config register */ #define TCV_CFG_PSELECT … #define TCV_CFG_PENABLE … #define TCV_CFG_BENABLE … #define TCV_CFG_PREGADDR … #define TCV_CFG_MDIO0 … #define TCV_CFG_MDIO1 … #define TCV_CFG_PDADDR … /* Here are some PHY addresses. */ #define TCV_PADDR_ETX … #define TCV_PADDR_ITX … /* Transceiver status register */ #define TCV_STAT_BASIC … #define TCV_STAT_NORMAL … /* Inside the Happy Meal transceiver is the physical layer, they use an * implementations for National Semiconductor, part number DP83840VCE. * You can retrieve the data sheets and programming docs for this beast * from http://www.national.com/ * * The DP83840 is capable of both 10 and 100Mbps ethernet, in both * half and full duplex mode. It also supports auto negotiation. * * But.... THIS THING IS A PAIN IN THE ASS TO PROGRAM! * Debugging eeprom burnt code is more fun than programming this chip! */ /* Generic MII registers defined in linux/mii.h, these below * are DP83840 specific. */ #define DP83840_CSCONFIG … /* The Carrier Sense config register. */ #define CSCONFIG_RESV1 … #define CSCONFIG_LED4 … #define CSCONFIG_LED1 … #define CSCONFIG_RESV2 … #define CSCONFIG_TCVDISAB … #define CSCONFIG_DFBYPASS … #define CSCONFIG_GLFORCE … #define CSCONFIG_CLKTRISTATE … #define CSCONFIG_RESV3 … #define CSCONFIG_ENCODE … #define CSCONFIG_RENABLE … #define CSCONFIG_TCDISABLE … #define CSCONFIG_RESV4 … #define CSCONFIG_NDISABLE … /* Happy Meal descriptor rings and such. * All descriptor rings must be aligned on a 2K boundary. * All receive buffers must be 64 byte aligned. * Always write the address first before setting the ownership * bits to avoid races with the hardware scanning the ring. */ hme32; struct happy_meal_rxd { … }; #define RXFLAG_OWN … #define RXFLAG_OVERFLOW … #define RXFLAG_SIZE … #define RXFLAG_CSUM … struct happy_meal_txd { … }; #define TXFLAG_OWN … #define TXFLAG_SOP … #define TXFLAG_EOP … #define TXFLAG_CSENABLE … #define TXFLAG_CSLOCATION … #define TXFLAG_CSBUFBEGIN … #define TXFLAG_SIZE … #define TX_RING_SIZE … #define RX_RING_SIZE … #if (TX_RING_SIZE < 16 || TX_RING_SIZE > 256 || (TX_RING_SIZE % 16) != 0) #error TX_RING_SIZE holds illegal value #endif #define TX_RING_MAXSIZE … #define RX_RING_MAXSIZE … /* We use a 14 byte offset for checksum computation. */ #if (RX_RING_SIZE == 32) #define ERX_CFG_DEFAULT(off) … #else #if (RX_RING_SIZE == 64) #define ERX_CFG_DEFAULT … #else #if (RX_RING_SIZE == 128) #define ERX_CFG_DEFAULT … #else #if (RX_RING_SIZE == 256) #define ERX_CFG_DEFAULT … #else #error RX_RING_SIZE holds illegal value #endif #endif #endif #endif #define NEXT_RX(num) … #define NEXT_TX(num) … #define PREV_RX(num) … #define PREV_TX(num) … #define TX_BUFFS_AVAIL(hp) … #define RX_OFFSET … #define RX_BUF_ALLOC_SIZE … #define RX_COPY_THRESHOLD … struct hmeal_init_block { … }; #define hblock_offset(mem, elem) … /* Now software state stuff. */ enum happy_transceiver { … }; /* Timer state engine. */ enum happy_timer_state { … }; struct quattro; /* Happy happy, joy joy! */ struct happy_meal { … }; /* Here are the happy flags. */ #define HFLAG_FENABLE … #define HFLAG_LANCE … #define HFLAG_RXENABLE … #define HFLAG_AUTO … #define HFLAG_FULL … #define HFLAG_MACFULL … #define HFLAG_RXCV … #define HFLAG_INIT … #define HFLAG_LINKUP … #define HFLAG_PCI … #define HFLAG_QUATTRO … #define HFLAG_20_21 … #define HFLAG_NOT_A0 … /* Support for QFE/Quattro cards. */ struct quattro { … }; /* We use this to acquire receive skb's that we can DMA directly into. */ #define ALIGNED_RX_SKB_ADDR(addr) … #define happy_meal_alloc_skb(__length, __gfp_flags) … #endif /* !(_SUNHME_H) */
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