/* * Driver for the IDT RC32434 (Korina) on-chip ethernet controller. * * Copyright 2004 IDT Inc. ([email protected]) * Copyright 2006 Felix Fietkau <[email protected]> * Copyright 2008 Florian Fainelli <[email protected]> * Copyright 2017 Roman Yeryomin <[email protected]> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. * * Writing to a DMA status register: * * When writing to the status register, you should mask the bit you have * been testing the status register with. Both Tx and Rx DMA registers * should stick to this procedure. */ #include <linux/module.h> #include <linux/kernel.h> #include <linux/moduleparam.h> #include <linux/sched.h> #include <linux/ctype.h> #include <linux/types.h> #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/iopoll.h> #include <linux/in.h> #include <linux/of.h> #include <linux/of_net.h> #include <linux/slab.h> #include <linux/string.h> #include <linux/delay.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> #include <linux/skbuff.h> #include <linux/errno.h> #include <linux/platform_device.h> #include <linux/mii.h> #include <linux/ethtool.h> #include <linux/crc32.h> #include <linux/pgtable.h> #include <linux/clk.h> #define DRV_NAME … #define DRV_VERSION … #define DRV_RELDATE … struct eth_regs { … }; /* Ethernet interrupt registers */ #define ETH_INT_FC_EN … #define ETH_INT_FC_ITS … #define ETH_INT_FC_RIP … #define ETH_INT_FC_JAM … #define ETH_INT_FC_OVR … #define ETH_INT_FC_UND … #define ETH_INT_FC_IOC … /* Ethernet FIFO registers */ #define ETH_FIFI_TT_TTH_BIT … #define ETH_FIFO_TT_TTH … /* Ethernet ARC/multicast registers */ #define ETH_ARC_PRO … #define ETH_ARC_AM … #define ETH_ARC_AFM … #define ETH_ARC_AB … /* Ethernet SAL registers */ #define ETH_SAL_BYTE_5 … #define ETH_SAL_BYTE_4 … #define ETH_SAL_BYTE_3 … #define ETH_SAL_BYTE_2 … /* Ethernet SAH registers */ #define ETH_SAH_BYTE1 … #define ETH_SAH_BYTE0 … /* Ethernet GPF register */ #define ETH_GPF_PTV … /* Ethernet PFG register */ #define ETH_PFS_PFD … /* Ethernet CFSA[0-3] registers */ #define ETH_CFSA0_CFSA4 … #define ETH_CFSA0_CFSA5 … #define ETH_CFSA1_CFSA2 … #define ETH_CFSA1_CFSA3 … #define ETH_CFSA1_CFSA0 … #define ETH_CFSA1_CFSA1 … /* Ethernet MAC1 registers */ #define ETH_MAC1_RE … #define ETH_MAC1_PAF … #define ETH_MAC1_RFC … #define ETH_MAC1_TFC … #define ETH_MAC1_LB … #define ETH_MAC1_MR … /* Ethernet MAC2 registers */ #define ETH_MAC2_FD … #define ETH_MAC2_FLC … #define ETH_MAC2_HFE … #define ETH_MAC2_DC … #define ETH_MAC2_CEN … #define ETH_MAC2_PE … #define ETH_MAC2_VPE … #define ETH_MAC2_APE … #define ETH_MAC2_PPE … #define ETH_MAC2_LPE … #define ETH_MAC2_NB … #define ETH_MAC2_BP … #define ETH_MAC2_ED … /* Ethernet IPGT register */ #define ETH_IPGT … /* Ethernet IPGR registers */ #define ETH_IPGR_IPGR2 … #define ETH_IPGR_IPGR1 … /* Ethernet CLRT registers */ #define ETH_CLRT_MAX_RET … #define ETH_CLRT_COL_WIN … /* Ethernet MAXF register */ #define ETH_MAXF … /* Ethernet test registers */ #define ETH_TEST_REG … #define ETH_MCP_DIV … /* MII registers */ #define ETH_MII_CFG_RSVD … #define ETH_MII_CMD_RD … #define ETH_MII_CMD_SCN … #define ETH_MII_REG_ADDR … #define ETH_MII_PHY_ADDR … #define ETH_MII_WTD_DATA … #define ETH_MII_RDD_DATA … #define ETH_MII_IND_BSY … #define ETH_MII_IND_SCN … #define ETH_MII_IND_NV … /* Values for the DEVCS field of the Ethernet DMA Rx and Tx descriptors. */ #define ETH_RX_FD … #define ETH_RX_LD … #define ETH_RX_ROK … #define ETH_RX_FM … #define ETH_RX_MP … #define ETH_RX_BP … #define ETH_RX_VLT … #define ETH_RX_CF … #define ETH_RX_OVR … #define ETH_RX_CRC … #define ETH_RX_CV … #define ETH_RX_DB … #define ETH_RX_LE … #define ETH_RX_LOR … #define ETH_RX_CES … #define ETH_RX_LEN_BIT … #define ETH_RX_LEN … #define ETH_TX_FD … #define ETH_TX_LD … #define ETH_TX_OEN … #define ETH_TX_PEN … #define ETH_TX_CEN … #define ETH_TX_HEN … #define ETH_TX_TOK … #define ETH_TX_MP … #define ETH_TX_BP … #define ETH_TX_UND … #define ETH_TX_OF … #define ETH_TX_ED … #define ETH_TX_EC … #define ETH_TX_LC … #define ETH_TX_TD … #define ETH_TX_CRC … #define ETH_TX_LE … #define ETH_TX_CC … /* DMA descriptor (in physical memory). */ struct dma_desc { … }; #define DMA_DESC_COUNT_BIT … #define DMA_DESC_COUNT_MSK … #define DMA_DESC_DS_BIT … #define DMA_DESC_DS_MSK … #define DMA_DESC_DEV_CMD_BIT … #define DMA_DESC_DEV_CMD_MSK … /* DMA descriptors interrupts */ #define DMA_DESC_COF … #define DMA_DESC_COD … #define DMA_DESC_IOF … #define DMA_DESC_IOD … #define DMA_DESC_TERM … #define DMA_DESC_DONE … #define DMA_DESC_FINI … /* DMA register (within Internal Register Map). */ struct dma_reg { … }; /* DMA channels specific registers */ #define DMA_CHAN_RUN_BIT … #define DMA_CHAN_DONE_BIT … #define DMA_CHAN_MODE_BIT … #define DMA_CHAN_MODE_MSK … #define DMA_CHAN_MODE_AUTO … #define DMA_CHAN_MODE_BURST … #define DMA_CHAN_MODE_XFRT … #define DMA_CHAN_MODE_RSVD … #define DMA_CHAN_ACT_BIT … /* DMA status registers */ #define DMA_STAT_FINI … #define DMA_STAT_DONE … #define DMA_STAT_CHAIN … #define DMA_STAT_ERR … #define DMA_STAT_HALT … #define STATION_ADDRESS_HIGH(dev) … #define STATION_ADDRESS_LOW(dev) … #define MII_CLOCK … /* the following must be powers of two */ #define KORINA_NUM_RDS … #define KORINA_NUM_TDS … /* KORINA_RBSIZE is the hardware's default maximum receive * frame size in bytes. Having this hardcoded means that there * is no support for MTU sizes greater than 1500. */ #define KORINA_RBSIZE … #define KORINA_RDS_MASK … #define KORINA_TDS_MASK … #define RD_RING_SIZE … #define TD_RING_SIZE … #define TX_TIMEOUT … enum chain_status { … }; #define DMA_COUNT(count) … #define IS_DMA_FINISHED(X) … #define IS_DMA_DONE(X) … #define RCVPKT_LENGTH(X) … /* Information that need to be kept for each board. */ struct korina_private { … }; static dma_addr_t korina_tx_dma(struct korina_private *lp, int idx) { … } static dma_addr_t korina_rx_dma(struct korina_private *lp, int idx) { … } static inline void korina_abort_dma(struct net_device *dev, struct dma_reg *ch) { … } static void korina_abort_tx(struct net_device *dev) { … } static void korina_abort_rx(struct net_device *dev) { … } /* transmit packet */ static netdev_tx_t korina_send_packet(struct sk_buff *skb, struct net_device *dev) { … } static int korina_mdio_wait(struct korina_private *lp) { … } static int korina_mdio_read(struct net_device *dev, int phy, int reg) { … } static void korina_mdio_write(struct net_device *dev, int phy, int reg, int val) { … } /* Ethernet Rx DMA interrupt */ static irqreturn_t korina_rx_dma_interrupt(int irq, void *dev_id) { … } static int korina_rx(struct net_device *dev, int limit) { … } static int korina_poll(struct napi_struct *napi, int budget) { … } /* * Set or clear the multicast filter for this adaptor. */ static void korina_multicast_list(struct net_device *dev) { … } static void korina_tx(struct net_device *dev) { … } static irqreturn_t korina_tx_dma_interrupt(int irq, void *dev_id) { … } static void korina_check_media(struct net_device *dev, unsigned int init_media) { … } static void korina_poll_media(struct timer_list *t) { … } static void korina_set_carrier(struct mii_if_info *mii) { … } static int korina_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) { … } /* ethtool helpers */ static void netdev_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) { … } static int netdev_get_link_ksettings(struct net_device *dev, struct ethtool_link_ksettings *cmd) { … } static int netdev_set_link_ksettings(struct net_device *dev, const struct ethtool_link_ksettings *cmd) { … } static u32 netdev_get_link(struct net_device *dev) { … } static const struct ethtool_ops netdev_ethtool_ops = …; static int korina_alloc_ring(struct net_device *dev) { … } static void korina_free_ring(struct net_device *dev) { … } /* * Initialize the RC32434 ethernet controller. */ static int korina_init(struct net_device *dev) { … } /* * Restart the RC32434 ethernet controller. */ static void korina_restart_task(struct work_struct *work) { … } static void korina_tx_timeout(struct net_device *dev, unsigned int txqueue) { … } #ifdef CONFIG_NET_POLL_CONTROLLER static void korina_poll_controller(struct net_device *dev) { … } #endif static int korina_open(struct net_device *dev) { … } static int korina_close(struct net_device *dev) { … } static const struct net_device_ops korina_netdev_ops = …; static int korina_probe(struct platform_device *pdev) { … } static void korina_remove(struct platform_device *pdev) { … } #ifdef CONFIG_OF static const struct of_device_id korina_match[] = …; MODULE_DEVICE_TABLE(of, korina_match); #endif static struct platform_driver korina_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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