/* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. * Copyright (C) 2018-2023 Linaro Ltd. */ #ifndef _GSI_REG_H_ #define _GSI_REG_H_ /* === Only "gsi.c" and "gsi_reg.c" should include this file === */ #include <linux/bits.h> struct platform_device; struct gsi; /** * DOC: GSI Registers * * GSI registers are located within the "gsi" address space defined by Device * Tree. The offset of each register within that space is specified by * symbols defined below. The GSI address space is mapped to virtual memory * space in gsi_init(). All GSI registers are 32 bits wide. * * Each register type is duplicated for a number of instances of something. * For example, each GSI channel has its own set of registers defining its * configuration. The offset to a channel's set of registers is computed * based on a "base" offset plus an additional "stride" amount computed * from the channel's ID. For such registers, the offset is computed by a * function-like macro that takes a parameter used in the computation. * * The offset of a register dependent on execution environment is computed * by a macro that is supplied a parameter "ee". The "ee" value is a member * of the gsi_ee_id enumerated type. * * The offset of a channel register is computed by a macro that is supplied a * parameter "ch". The "ch" value is a channel id whose maximum value is 30 * (though the actual limit is hardware-dependent). * * The offset of an event register is computed by a macro that is supplied a * parameter "ev". The "ev" value is an event id whose maximum value is 15 * (though the actual limit is hardware-dependent). */ /* enum gsi_reg_id - GSI register IDs */ enum gsi_reg_id { … }; /* CH_C_CNTXT_0 register */ enum gsi_reg_ch_c_cntxt_0_field_id { … }; /** enum gsi_channel_type - CHTYPE_PROTOCOL field values in CH_C_CNTXT_0 */ enum gsi_channel_type { … }; /* CH_C_CNTXT_1 register */ enum gsi_reg_ch_c_cntxt_1_field_id { … }; /* CH_C_QOS register */ enum gsi_reg_ch_c_qos_field_id { … }; /** enum gsi_prefetch_mode - PREFETCH_MODE field in CH_C_QOS */ enum gsi_prefetch_mode { … }; /* EV_CH_E_CNTXT_0 register */ enum gsi_reg_ch_c_ev_ch_e_cntxt_0_field_id { … }; /* EV_CH_E_CNTXT_1 register */ enum gsi_reg_ev_ch_c_cntxt_1_field_id { … }; /* EV_CH_E_CNTXT_8 register */ enum gsi_reg_ch_c_ev_ch_e_cntxt_8_field_id { … }; /* GSI_STATUS register */ enum gsi_reg_gsi_status_field_id { … }; /* CH_CMD register */ enum gsi_reg_gsi_ch_cmd_field_id { … }; /** enum gsi_ch_cmd_opcode - CH_OPCODE field values in CH_CMD */ enum gsi_ch_cmd_opcode { … }; /* EV_CH_CMD register */ enum gsi_ev_ch_cmd_field_id { … }; /** enum gsi_evt_cmd_opcode - EV_OPCODE field values in EV_CH_CMD */ enum gsi_evt_cmd_opcode { … }; /* GENERIC_CMD register */ enum gsi_generic_cmd_field_id { … }; /** enum gsi_generic_cmd_opcode - GENERIC_OPCODE field values in GENERIC_CMD */ enum gsi_generic_cmd_opcode { … }; /* HW_PARAM_2 register */ /* IPA v3.5.1+ */ enum gsi_hw_param_2_field_id { … }; /** enum gsi_iram_size - IRAM_SIZE field values in HW_PARAM_2 */ enum gsi_iram_size { … }; /* HW_PARAM_4 register */ /* IPA v5.0+ */ enum gsi_hw_param_4_field_id { … }; /** * enum gsi_irq_type_id: GSI IRQ types * @GSI_CH_CTRL: Channel allocation, deallocation, etc. * @GSI_EV_CTRL: Event ring allocation, deallocation, etc. * @GSI_GLOB_EE: Global/general event * @GSI_IEOB: Transfer (TRE) completion * @GSI_INTER_EE_CH_CTRL: Remote-issued stop/reset (unused) * @GSI_INTER_EE_EV_CTRL: Remote-issued event reset (unused) * @GSI_GENERAL: General hardware event (bus error, etc.) */ enum gsi_irq_type_id { … }; /** enum gsi_global_irq_id: Global GSI interrupt events */ enum gsi_global_irq_id { … }; /** enum gsi_general_irq_id: GSI general IRQ conditions */ enum gsi_general_irq_id { … }; /* CNTXT_INTSET register */ enum gsi_cntxt_intset_field_id { … }; /* ERROR_LOG register */ enum gsi_error_log_field_id { … }; /** enum gsi_err_code - ERR_CODE field values in EE_ERR_LOG */ enum gsi_err_code { … }; /** enum gsi_err_type - ERR_TYPE field values in EE_ERR_LOG */ enum gsi_err_type { … }; /* CNTXT_SCRATCH_0 register */ enum gsi_cntxt_scratch_0_field_id { … }; /** enum gsi_generic_ee_result - GENERIC_EE_RESULT field values in SCRATCH_0 */ enum gsi_generic_ee_result { … }; extern const struct regs gsi_regs_v3_1; extern const struct regs gsi_regs_v3_5_1; extern const struct regs gsi_regs_v4_0; extern const struct regs gsi_regs_v4_5; extern const struct regs gsi_regs_v4_9; extern const struct regs gsi_regs_v4_11; extern const struct regs gsi_regs_v5_0; /** * gsi_reg() - Return the structure describing a GSI register * @gsi: GSI pointer * @reg_id: GSI register ID */ const struct reg *gsi_reg(struct gsi *gsi, enum gsi_reg_id reg_id); /** * gsi_reg_init() - Perform GSI register initialization * @gsi: GSI pointer * @pdev: GSI (IPA) platform device * * Initialize GSI registers, including looking up and I/O mapping * the "gsi" memory space. */ int gsi_reg_init(struct gsi *gsi, struct platform_device *pdev); /** * gsi_reg_exit() - Inverse of gsi_reg_init() * @gsi: GSI pointer */ void gsi_reg_exit(struct gsi *gsi); #endif /* _GSI_REG_H_ */
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