/* * Copyright (c) 2008-2009 Atheros Communications Inc. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #ifndef ATH_H #define ATH_H #include <linux/etherdevice.h> #include <linux/skbuff.h> #include <linux/if_ether.h> #include <linux/spinlock.h> #include <net/mac80211.h> /* * The key cache is used for h/w cipher state and also for * tracking station state such as the current tx antenna. * We also setup a mapping table between key cache slot indices * and station state to short-circuit node lookups on rx. * Different parts have different size key caches. We handle * up to ATH_KEYMAX entries (could dynamically allocate state). */ #define ATH_KEYMAX … struct ath_ani { … }; struct ath_cycle_counters { … }; enum ath_device_state { … }; enum ath_op_flags { … }; enum ath_bus_type { … }; struct reg_dmn_pair_mapping { … }; struct ath_regulatory { … }; enum ath_crypt_caps { … }; struct ath_keyval { … }; enum ath_cipher { … }; /** * struct ath_ops - Register read/write operations * * @read: Register read * @multi_read: Multiple register read * @write: Register write * @enable_write_buffer: Enable multiple register writes * @write_flush: flush buffered register writes and disable buffering */ struct ath_ops { … }; struct ath_common; struct ath_bus_ops; struct ath_ps_ops { … }; struct ath_common { … }; static inline const struct ath_ps_ops *ath_ps_ops(struct ath_common *common) { … } struct sk_buff *ath_rxbuf_alloc(struct ath_common *common, u32 len, gfp_t gfp_mask); bool ath_is_mybeacon(struct ath_common *common, struct ieee80211_hdr *hdr); void ath_hw_setbssidmask(struct ath_common *common); void ath_key_delete(struct ath_common *common, u8 hw_key_idx); int ath_key_config(struct ath_common *common, struct ieee80211_vif *vif, struct ieee80211_sta *sta, struct ieee80211_key_conf *key); bool ath_hw_keyreset(struct ath_common *common, u16 entry); bool ath_hw_keysetmac(struct ath_common *common, u16 entry, const u8 *mac); void ath_hw_cycle_counters_update(struct ath_common *common); int32_t ath_hw_get_listen_time(struct ath_common *common); __printf(3, 4) void ath_printk(const char *level, const struct ath_common *common, const char *fmt, ...); #define ath_emerg(common, fmt, ...) … #define ath_alert(common, fmt, ...) … #define ath_crit(common, fmt, ...) … #define ath_err(common, fmt, ...) … #define ath_warn(common, fmt, ...) … #define ath_notice(common, fmt, ...) … #define ath_info(common, fmt, ...) … /** * enum ath_debug_level - atheros wireless debug level * * @ATH_DBG_RESET: reset processing * @ATH_DBG_QUEUE: hardware queue management * @ATH_DBG_EEPROM: eeprom processing * @ATH_DBG_CALIBRATE: periodic calibration * @ATH_DBG_INTERRUPT: interrupt processing * @ATH_DBG_REGULATORY: regulatory processing * @ATH_DBG_ANI: adaptive noise immunitive processing * @ATH_DBG_XMIT: basic xmit operation * @ATH_DBG_BEACON: beacon handling * @ATH_DBG_CONFIG: configuration of the hardware * @ATH_DBG_FATAL: fatal errors, this is the default, DBG_DEFAULT * @ATH_DBG_PS: power save processing * @ATH_DBG_HWTIMER: hardware timer handling * @ATH_DBG_BTCOEX: bluetooth coexistance * @ATH_DBG_BSTUCK: stuck beacons * @ATH_DBG_MCI: Message Coexistence Interface, a private protocol * used exclusively for WLAN-BT coexistence starting from * AR9462. * @ATH_DBG_DFS: radar datection * @ATH_DBG_WOW: Wake on Wireless * @ATH_DBG_DYNACK: dynack handling * @ATH_DBG_SPECTRAL_SCAN: FFT spectral scan * @ATH_DBG_ANY: enable all debugging * * The debug level is used to control the amount and type of debugging output * we want to see. Each driver has its own method for enabling debugging and * modifying debug level states -- but this is typically done through a * module parameter 'debug' along with a respective 'debug' debugfs file * entry. */ enum ATH_DEBUG { … }; #define ATH_DBG_DEFAULT … #define ATH_DBG_MAX_LEN … #ifdef CONFIG_ATH_DEBUG #define ath_dbg(common, dbg_mask, fmt, ...) … #define ATH_DBG_WARN(foo, arg...) … #define ATH_DBG_WARN_ON_ONCE(foo) … #else static inline __attribute__ ((format (printf, 3, 4))) void _ath_dbg(struct ath_common *common, enum ATH_DEBUG dbg_mask, const char *fmt, ...) { } #define ath_dbg … #define ATH_DBG_WARN … #define ATH_DBG_WARN_ON_ONCE … #endif /* CONFIG_ATH_DEBUG */ /** Returns string describing opmode, or NULL if unknown mode. */ #ifdef CONFIG_ATH_DEBUG const char *ath_opmode_to_string(enum nl80211_iftype opmode); #else static inline const char *ath_opmode_to_string(enum nl80211_iftype opmode) { return "UNKNOWN"; } #endif extern const char *ath_bus_type_strings[]; static inline const char *ath_bus_type_to_string(enum ath_bus_type bustype) { … } #endif /* ATH_H */
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