linux/drivers/net/wireless/ath/ath9k/hw.c

/*
 * Copyright (c) 2008-2011 Atheros Communications Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include <linux/io.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/time.h>
#include <linux/bitops.h>
#include <linux/etherdevice.h>
#include <linux/gpio.h>
#include <asm/unaligned.h>

#include "hw.h"
#include "hw-ops.h"
#include "ar9003_mac.h"
#include "ar9003_mci.h"
#include "ar9003_phy.h"
#include "ath9k.h"

static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type);

MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;

static void ath9k_hw_set_clockrate(struct ath_hw *ah)
{ … }

static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs)
{ … }

bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan,
			  int hw_delay)
{ … }

void ath9k_hw_write_array(struct ath_hw *ah, const struct ar5416IniArray *array,
			  int column, unsigned int *writecnt)
{ … }

void ath9k_hw_read_array(struct ath_hw *ah, u32 array[][2], int size)
{ … }

u32 ath9k_hw_reverse_bits(u32 val, u32 n)
{ … }

u16 ath9k_hw_computetxtime(struct ath_hw *ah,
			   u8 phy, int kbps,
			   u32 frameLen, u16 rateix,
			   bool shortPreamble)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_get_channel_centers(struct ath_hw *ah,
				  struct ath9k_channel *chan,
				  struct chan_centers *centers)
{ … }

/******************/
/* Chip Revisions */
/******************/

static bool ath9k_hw_read_revisions(struct ath_hw *ah)
{ … }

/************************************/
/* HW Attach, Detach, Init Routines */
/************************************/

static void ath9k_hw_disablepcie(struct ath_hw *ah)
{ … }

/* This should work for all families including legacy */
static bool ath9k_hw_chip_test(struct ath_hw *ah)
{ … }

static void ath9k_hw_init_config(struct ath_hw *ah)
{ … }

static void ath9k_hw_init_defaults(struct ath_hw *ah)
{ … }

static void ath9k_hw_init_macaddr(struct ath_hw *ah)
{ … }

static int ath9k_hw_post_init(struct ath_hw *ah)
{ … }

static int ath9k_hw_attach_ops(struct ath_hw *ah)
{ … }

/* Called for all hardware families */
static int __ath9k_hw_init(struct ath_hw *ah)
{ … }

int ath9k_hw_init(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

static void ath9k_hw_init_qos(struct ath_hw *ah)
{ … }

u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

static void ath9k_hw_init_pll(struct ath_hw *ah,
			      struct ath9k_channel *chan)
{ … }

static void ath9k_hw_init_interrupt_masks(struct ath_hw *ah,
					  enum nl80211_iftype opmode)
{ … }

static void ath9k_hw_set_sifs_time(struct ath_hw *ah, u32 us)
{ … }

void ath9k_hw_setslottime(struct ath_hw *ah, u32 us)
{ … }

void ath9k_hw_set_ack_timeout(struct ath_hw *ah, u32 us)
{ … }

void ath9k_hw_set_cts_timeout(struct ath_hw *ah, u32 us)
{ … }

static bool ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu)
{ … }

void ath9k_hw_init_global_settings(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_deinit(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

/*******/
/* INI */
/*******/

u32 ath9k_regd_get_ctl(struct ath_regulatory *reg, struct ath9k_channel *chan)
{ … }

/****************************************/
/* Reset and Channel Switching Routines */
/****************************************/

static inline void ath9k_hw_set_dma(struct ath_hw *ah)
{ … }

static void ath9k_hw_set_operating_mode(struct ath_hw *ah, int opmode)
{ … }

void ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled,
				   u32 *coef_mantissa, u32 *coef_exponent)
{ … }

/* AR9330 WAR:
 * call external reset function to reset WMAC if:
 * - doing a cold reset
 * - we have pending frames in the TX queues.
 */
static bool ath9k_hw_ar9330_reset_war(struct ath_hw *ah, int type)
{ … }

static bool ath9k_hw_set_reset(struct ath_hw *ah, int type)
{ … }

static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah)
{ … }

static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type)
{ … }

static bool ath9k_hw_chip_reset(struct ath_hw *ah,
				struct ath9k_channel *chan)
{ … }

static bool ath9k_hw_channel_change(struct ath_hw *ah,
				    struct ath9k_channel *chan)
{ … }

static void ath9k_hw_apply_gpio_override(struct ath_hw *ah)
{ … }

void ath9k_hw_check_nav(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

bool ath9k_hw_check_alive(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

static void ath9k_hw_init_mfp(struct ath_hw *ah)
{ … }

static void ath9k_hw_reset_opmode(struct ath_hw *ah,
				  u32 macStaId1, u32 saveDefAntenna)
{ … }

static void ath9k_hw_init_queues(struct ath_hw *ah)
{ … }

/*
 * For big endian systems turn on swapping for descriptors
 */
static void ath9k_hw_init_desc(struct ath_hw *ah)
{ … }

/*
 * Fast channel change:
 * (Change synthesizer based on channel freq without resetting chip)
 */
static int ath9k_hw_do_fastcc(struct ath_hw *ah, struct ath9k_channel *chan)
{ … }

u32 ath9k_hw_get_tsf_offset(struct timespec64 *last, struct timespec64 *cur)
{ … }
EXPORT_SYMBOL(…);

int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
		   struct ath9k_hw_cal_data *caldata, bool fastcc)
{ … }
EXPORT_SYMBOL(…);

/******************************/
/* Power Management (Chipset) */
/******************************/

/*
 * Notify Power Mgt is disabled in self-generated frames.
 * If requested, force chip to sleep.
 */
static void ath9k_set_power_sleep(struct ath_hw *ah)
{ … }

/*
 * Notify Power Management is enabled in self-generating
 * frames. If request, set power mode of chip to
 * auto/normal.  Duration in units of 128us (1/8 TU).
 */
static void ath9k_set_power_network_sleep(struct ath_hw *ah)
{ … }

static bool ath9k_hw_set_power_awake(struct ath_hw *ah)
{ … }

bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode)
{ … }
EXPORT_SYMBOL(…);

/*******************/
/* Beacon Handling */
/*******************/

void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
				    const struct ath9k_beacon_state *bs)
{ … }
EXPORT_SYMBOL(…);

/*******************/
/* HW Capabilities */
/*******************/

static u8 fixup_chainmask(u8 chip_chainmask, u8 eeprom_chainmask)
{ … }

/**
 * ath9k_hw_dfs_tested - checks if DFS has been tested with used chipset
 * @ah: the atheros hardware data structure
 *
 * We enable DFS support upstream on chipsets which have passed a series
 * of tests. The testing requirements are going to be documented. Desired
 * test requirements are documented at:
 *
 * https://wireless.wiki.kernel.org/en/users/Drivers/ath9k/dfs
 *
 * Once a new chipset gets properly tested an individual commit can be used
 * to document the testing for DFS for that chipset.
 */
static bool ath9k_hw_dfs_tested(struct ath_hw *ah)
{ … }

static void ath9k_gpio_cap_init(struct ath_hw *ah)
{ … }

int ath9k_hw_fill_cap_info(struct ath_hw *ah)
{ … }

/****************************/
/* GPIO / RFKILL / Antennae */
/****************************/

static void ath9k_hw_gpio_cfg_output_mux(struct ath_hw *ah, u32 gpio, u32 type)
{ … }

/* BSP should set the corresponding MUX register correctly.
 */
static void ath9k_hw_gpio_cfg_soc(struct ath_hw *ah, u32 gpio, bool out,
				  const char *label)
{ … }

static void ath9k_hw_gpio_cfg_wmac(struct ath_hw *ah, u32 gpio, bool out,
				   u32 ah_signal_type)
{ … }

static void ath9k_hw_gpio_request(struct ath_hw *ah, u32 gpio, bool out,
				  const char *label, u32 ah_signal_type)
{ … }

void ath9k_hw_gpio_request_in(struct ath_hw *ah, u32 gpio, const char *label)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_gpio_request_out(struct ath_hw *ah, u32 gpio, const char *label,
			       u32 ah_signal_type)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_gpio_free(struct ath_hw *ah, u32 gpio)
{ … }
EXPORT_SYMBOL(…);

u32 ath9k_hw_gpio_get(struct ath_hw *ah, u32 gpio)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna)
{ … }
EXPORT_SYMBOL(…);

/*********************/
/* General Operation */
/*********************/

u32 ath9k_hw_getrxfilter(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits)
{ … }
EXPORT_SYMBOL(…);

bool ath9k_hw_phy_disable(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

bool ath9k_hw_disable(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

static int get_antenna_gain(struct ath_hw *ah, struct ath9k_channel *chan)
{ … }

void ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan,
			    bool test)
{ … }

void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_setopmode(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_write_associd(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

#define ATH9K_MAX_TSF_READ …

u64 ath9k_hw_gettsf64(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_reset_tsf(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_set_tsfadjust(struct ath_hw *ah, bool set)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_set11nmac2040(struct ath_hw *ah, struct ath9k_channel *chan)
{ … }

/* HW Generic timers configuration */

static const struct ath_gen_timer_configuration gen_tmr_configuration[] = …;

/* HW generic timer primitives */

u32 ath9k_hw_gettsf32(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_gen_timer_start_tsf2(struct ath_hw *ah)
{ … }

struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
					  void (*trigger)(void *),
					  void (*overflow)(void *),
					  void *arg,
					  u8 timer_index)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_gen_timer_start(struct ath_hw *ah,
			      struct ath_gen_timer *timer,
			      u32 timer_next,
			      u32 timer_period)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
{ … }
EXPORT_SYMBOL(…);

void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer)
{ … }
EXPORT_SYMBOL(…);

/*
 * Generic Timer Interrupts handling
 */
void ath_gen_timer_isr(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

/********/
/* HTC  */
/********/

static struct { … } ath_mac_bb_names[] = …;

/* For devices with external radios */
static struct { … } ath_rf_names[] = …;

/*
 * Return the MAC/BB name. "????" is returned if the MAC/BB is unknown.
 */
static const char *ath9k_hw_mac_bb_name(u32 mac_bb_version)
{ … }

/*
 * Return the RF name. "????" is returned if the RF is unknown.
 * Used for devices with external radios.
 */
static const char *ath9k_hw_rf_name(u16 rf_version)
{ … }

void ath9k_hw_name(struct ath_hw *ah, char *hw_name, size_t len)
{ … }
EXPORT_SYMBOL(…);