#ifndef INITVALS_9462_2P1_H
#define INITVALS_9462_2P1_H
#define ar9462_2p1_mac_postamble …
#define ar9462_2p1_baseband_core …
#define ar9462_2p1_radio_core …
#define ar9462_2p1_radio_postamble …
#define ar9462_2p1_soc_postamble …
#define ar9462_2p1_radio_postamble_sys2ant …
#define ar9462_2p1_common_rx_gain …
#define ar9462_2p1_common_mixed_rx_gain …
#define ar9462_2p1_common_5g_xlna_only_rxgain …
#define ar9462_2p1_baseband_core_mix_rxgain …
#define ar9462_2p1_baseband_postamble_mix_rxgain …
#define ar9462_2p1_baseband_postamble_5g_xlna …
#define ar9462_2p1_common_wo_xlna_rx_gain …
#define ar9462_2p1_modes_low_ob_db_tx_gain …
#define ar9462_2p1_modes_high_ob_db_tx_gain …
#define ar9462_2p1_modes_mix_ob_db_tx_gain …
#define ar9462_2p1_modes_fast_clock …
#define ar9462_2p1_baseband_core_txfir_coeff_japan_2484 …
#define ar9462_2p1_pciephy_clkreq_disable_L1 …
static const u32 ar9462_2p1_mac_core[][2] = …;
static const u32 ar9462_2p1_baseband_postamble[][5] = …;
static const u32 ar9462_2p1_soc_preamble[][2] = …;
#endif