#ifndef INITVALS_956X_H
#define INITVALS_956X_H
#define qca956x_1p0_mac_core …
#define qca956x_1p0_mac_postamble …
#define qca956x_1p0_soc_preamble …
#define qca956x_1p0_soc_postamble …
#define qca956x_1p0_common_wo_xlna_rx_gain_table …
#define qca956x_1p0_baseband_postamble_dfs_channel …
#define qca956x_1p0_common_wo_xlna_rx_gain_bounds …
#define qca956x_1p0_common_rx_gain_bounds …
#define qca956x_1p0_modes_fast_clock …
static const u32 qca956x_1p0_baseband_core[][2] = …;
static const u32 qca956x_1p0_baseband_postamble[][5] = …;
static const u32 qca956x_1p0_radio_core[][2] = …;
static const u32 qca956x_1p0_radio_postamble[][5] = …;
static const u32 qca956x_1p0_baseband_core_txfir_coeff_japan_2484[][2] = …;
static const u32 qca956x_1p0_modes_no_xpa_tx_gain_table[][3] = …;
static const u32 qca956x_1p0_modes_xpa_tx_gain_table[][3] = …;
static const u32 qca956x_1p0_modes_no_xpa_low_ob_db_tx_gain_table[][3] = …;
static const u32 qca956x_1p0_modes_no_xpa_green_tx_gain_table[][3] = …;
static const u32 qca956x_1p0_common_rx_gain_table[][2] = …;
static const u32 qca956x_1p0_xlna_only[][5] = …;
#endif