linux/drivers/net/wireless/ath/ath9k/mac.c

/*
 * Copyright (c) 2008-2011 Atheros Communications Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include "hw.h"
#include "hw-ops.h"
#include <linux/export.h>

static void ath9k_hw_set_txq_interrupts(struct ath_hw *ah,
					struct ath9k_tx_queue_info *qi)
{ … }

u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_txstart(struct ath_hw *ah, u32 q)
{ … }
EXPORT_SYMBOL(…);

u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q)
{ … }
EXPORT_SYMBOL(…);

/**
 * ath9k_hw_updatetxtriglevel - adjusts the frame trigger level
 *
 * @ah: atheros hardware struct
 * @bIncTrigLevel: whether or not the frame trigger level should be updated
 *
 * The frame trigger level specifies the minimum number of bytes,
 * in units of 64 bytes, that must be DMA'ed into the PCU TX FIFO
 * before the PCU will initiate sending the frame on the air. This can
 * mean we initiate transmit before a full frame is on the PCU TX FIFO.
 * Resets to 0x1 (meaning 64 bytes or a full frame, whichever occurs
 * first)
 *
 * Caution must be taken to ensure to set the frame trigger level based
 * on the DMA request size. For example if the DMA request size is set to
 * 128 bytes the trigger level cannot exceed 6 * 64 = 384. This is because
 * there need to be enough space in the tx FIFO for the requested transfer
 * size. Hence the tx FIFO will stop with 512 - 128 = 384 bytes. If we set
 * the threshold to a value beyond 6, then the transmit will hang.
 *
 * Current dual   stream devices have a PCU TX FIFO size of 8 KB.
 * Current single stream devices have a PCU TX FIFO size of 4 KB, however,
 * there is a hardware issue which forces us to use 2 KB instead so the
 * frame trigger level must not exceed 2 KB for these chipsets.
 */
bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_abort_tx_dma(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

bool ath9k_hw_stop_dma_queue(struct ath_hw *ah, u32 q)
{ … }
EXPORT_SYMBOL(…);

bool ath9k_hw_set_txq_props(struct ath_hw *ah, int q,
			    const struct ath9k_tx_queue_info *qinfo)
{ … }
EXPORT_SYMBOL(…);

bool ath9k_hw_get_txq_props(struct ath_hw *ah, int q,
			    struct ath9k_tx_queue_info *qinfo)
{ … }
EXPORT_SYMBOL(…);

int ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type,
			  const struct ath9k_tx_queue_info *qinfo)
{ … }
EXPORT_SYMBOL(…);

static void ath9k_hw_clear_queue_interrupts(struct ath_hw *ah, u32 q)
{ … }

bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q)
{ … }
EXPORT_SYMBOL(…);

bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
{ … }
EXPORT_SYMBOL(…);

int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds,
			struct ath_rx_status *rs)
{ … }
EXPORT_SYMBOL(…);

/*
 * This can stop or re-enables RX.
 *
 * If bool is set this will kill any frame which is currently being
 * transferred between the MAC and baseband and also prevent any new
 * frames from getting started.
 */
bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_putrxbuf(struct ath_hw *ah, u32 rxdp)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_startpcureceive(struct ath_hw *ah, bool is_scanning)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_abortpcurecv(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

bool ath9k_hw_stopdmarecv(struct ath_hw *ah, bool *reset)
{ … }
EXPORT_SYMBOL(…);

int ath9k_hw_beaconq_setup(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

bool ath9k_hw_intrpend(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_kill_interrupts(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_disable_interrupts(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

static void __ath9k_hw_enable_interrupts(struct ath_hw *ah)
{ … }

void ath9k_hw_resume_interrupts(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_enable_interrupts(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

void ath9k_hw_set_interrupts(struct ath_hw *ah)
{ … }
EXPORT_SYMBOL(…);

#define ATH9K_HW_MAX_DCU …
#define ATH9K_HW_SLICE_PER_DCU …
#define ATH9K_HW_BIT_IN_SLICE …
void ath9k_hw_set_tx_filter(struct ath_hw *ah, u8 destidx, bool set)
{ … }
EXPORT_SYMBOL(…);