/* * Copyright (c) 2004-2011 Atheros Communications Inc. * Copyright (c) 2011 Qualcomm Atheros, Inc. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #ifndef HIF_H #define HIF_H #include "common.h" #include "core.h" #include <linux/scatterlist.h> #define BUS_REQUEST_MAX_NUM … #define HIF_MBOX_BLOCK_SIZE … #define HIF_MBOX0_BLOCK_SIZE … #define HIF_DMA_BUFFER_SIZE … #define CMD53_FIXED_ADDRESS … #define CMD53_INCR_ADDRESS … #define MAX_SCATTER_REQUESTS … #define MAX_SCATTER_ENTRIES_PER_REQ … #define MAX_SCATTER_REQ_TRANSFER_SIZE … /* Mailbox address in SDIO address space */ #define HIF_MBOX_BASE_ADDR … #define HIF_MBOX_WIDTH … #define HIF_MBOX_END_ADDR … /* version 1 of the chip has only a 12K extended mbox range */ #define HIF_MBOX0_EXT_BASE_ADDR … #define HIF_MBOX0_EXT_WIDTH … /* GMBOX addresses */ #define HIF_GMBOX_BASE_ADDR … #define HIF_GMBOX_WIDTH … /* interrupt mode register */ #define CCCR_SDIO_IRQ_MODE_REG … /* mode to enable special 4-bit interrupt assertion without clock */ #define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ … /* HTC runs over mailbox 0 */ #define HTC_MAILBOX … #define ATH6KL_TARGET_DEBUG_INTR_MASK … /* FIXME: are these duplicates with MAX_SCATTER_ values in hif.h? */ #define ATH6KL_SCATTER_ENTRIES_PER_REQ … #define ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER … #define ATH6KL_SCATTER_REQS … #define ATH6KL_HIF_COMMUNICATION_TIMEOUT … struct bus_request { … }; /* direction of transfer (read/write) */ #define HIF_READ … #define HIF_WRITE … #define HIF_DIR_MASK … /* * emode - This indicates the whether the command is to be executed in a * blocking or non-blocking fashion (HIF_SYNCHRONOUS/ * HIF_ASYNCHRONOUS). The read/write data paths in HTC have been * implemented using the asynchronous mode allowing the bus * driver to indicate the completion of operation through the * registered callback routine. The requirement primarily comes * from the contexts these operations get called from (a driver's * transmit context or the ISR context in case of receive). * Support for both of these modes is essential. */ #define HIF_SYNCHRONOUS … #define HIF_ASYNCHRONOUS … #define HIF_EMODE_MASK … /* * dmode - An interface may support different kinds of commands based on * the tradeoff between the amount of data it can carry and the * setup time. Byte and Block modes are supported (HIF_BYTE_BASIS/ * HIF_BLOCK_BASIS). In case of latter, the data is rounded off * to the nearest block size by padding. The size of the block is * configurable at compile time using the HIF_BLOCK_SIZE and is * negotiated with the target during initialization after the * ATH6KL interrupts are enabled. */ #define HIF_BYTE_BASIS … #define HIF_BLOCK_BASIS … #define HIF_DMODE_MASK … /* * amode - This indicates if the address has to be incremented on ATH6KL * after every read/write operation (HIF?FIXED_ADDRESS/ * HIF_INCREMENTAL_ADDRESS). */ #define HIF_FIXED_ADDRESS … #define HIF_INCREMENTAL_ADDRESS … #define HIF_AMODE_MASK … #define HIF_WR_ASYNC_BYTE_INC … #define HIF_WR_ASYNC_BLOCK_INC … #define HIF_WR_SYNC_BYTE_FIX … #define HIF_WR_SYNC_BYTE_INC … #define HIF_WR_SYNC_BLOCK_INC … #define HIF_RD_SYNC_BYTE_INC … #define HIF_RD_SYNC_BYTE_FIX … #define HIF_RD_ASYNC_BLOCK_FIX … #define HIF_RD_SYNC_BLOCK_FIX … struct hif_scatter_item { … }; struct hif_scatter_req { … }; struct ath6kl_irq_proc_registers { … } __packed; struct ath6kl_irq_enable_reg { … } __packed; struct ath6kl_device { … }; struct ath6kl_hif_ops { … }; int ath6kl_hif_setup(struct ath6kl_device *dev); int ath6kl_hif_unmask_intrs(struct ath6kl_device *dev); int ath6kl_hif_mask_intrs(struct ath6kl_device *dev); int ath6kl_hif_poll_mboxmsg_rx(struct ath6kl_device *dev, u32 *lk_ahd, int timeout); int ath6kl_hif_rx_control(struct ath6kl_device *dev, bool enable_rx); int ath6kl_hif_disable_intrs(struct ath6kl_device *dev); int ath6kl_hif_rw_comp_handler(void *context, int status); int ath6kl_hif_intr_bh_handler(struct ath6kl *ar); /* Scatter Function and Definitions */ int ath6kl_hif_submit_scat_req(struct ath6kl_device *dev, struct hif_scatter_req *scat_req, bool read); #endif
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