linux/drivers/net/wireless/ath/wil6210/interrupt.c

// SPDX-License-Identifier: ISC
/*
 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
 */

#include <linux/interrupt.h>

#include "wil6210.h"
#include "trace.h"

/*
 * Theory of operation:
 *
 * There is ISR pseudo-cause register,
 * dma_rgf->DMA_RGF.PSEUDO_CAUSE.PSEUDO_CAUSE
 * Its bits represents OR'ed bits from 3 real ISR registers:
 * TX, RX, and MISC.
 *
 * Registers may be configured to either "write 1 to clear" or
 * "clear on read" mode
 *
 * When handling interrupt, one have to mask/unmask interrupts for the
 * real ISR registers, or hardware may malfunction.
 *
 */

#define WIL6210_IRQ_DISABLE …
#define WIL6210_IRQ_DISABLE_NO_HALP …
#define WIL6210_IMC_RX …
#define WIL6210_IMC_RX_NO_RX_HTRSH …
#define WIL6210_IMC_TX …
#define WIL6210_IMC_TX_EDMA …
#define WIL6210_IMC_RX_EDMA …
#define WIL6210_IMC_MISC_NO_HALP …
#define WIL6210_IMC_MISC …
#define WIL6210_IRQ_PSEUDO_MASK …

#if defined(CONFIG_WIL6210_ISR_COR)
/* configure to Clear-On-Read mode */
#define WIL_ICR_ICC_VALUE …
#define WIL_ICR_ICC_MISC_VALUE …

static inline void wil_icr_clear(u32 x, void __iomem *addr)
{ … }
#else /* defined(CONFIG_WIL6210_ISR_COR) */
/* configure to Write-1-to-Clear mode */
#define WIL_ICR_ICC_VALUE …
#define WIL_ICR_ICC_MISC_VALUE …

static inline void wil_icr_clear(u32 x, void __iomem *addr)
{
	writel(x, addr);
}
#endif /* defined(CONFIG_WIL6210_ISR_COR) */

static inline u32 wil_ioread32_and_clear(void __iomem *addr)
{ … }

static void wil6210_mask_irq_tx(struct wil6210_priv *wil)
{ … }

static void wil6210_mask_irq_tx_edma(struct wil6210_priv *wil)
{ … }

static void wil6210_mask_irq_rx(struct wil6210_priv *wil)
{ … }

static void wil6210_mask_irq_rx_edma(struct wil6210_priv *wil)
{ … }

static void wil6210_mask_irq_misc(struct wil6210_priv *wil, bool mask_halp)
{ … }

void wil6210_mask_halp(struct wil6210_priv *wil)
{ … }

static void wil6210_mask_irq_pseudo(struct wil6210_priv *wil)
{ … }

void wil6210_unmask_irq_tx(struct wil6210_priv *wil)
{ … }

void wil6210_unmask_irq_tx_edma(struct wil6210_priv *wil)
{ … }

void wil6210_unmask_irq_rx(struct wil6210_priv *wil)
{ … }

void wil6210_unmask_irq_rx_edma(struct wil6210_priv *wil)
{ … }

static void wil6210_unmask_irq_misc(struct wil6210_priv *wil, bool unmask_halp)
{ … }

static void wil6210_unmask_halp(struct wil6210_priv *wil)
{ … }

static void wil6210_unmask_irq_pseudo(struct wil6210_priv *wil)
{ … }

void wil_mask_irq(struct wil6210_priv *wil)
{ … }

void wil_unmask_irq(struct wil6210_priv *wil)
{ … }

void wil_configure_interrupt_moderation_edma(struct wil6210_priv *wil)
{ … }

void wil_configure_interrupt_moderation(struct wil6210_priv *wil)
{ … }

static irqreturn_t wil6210_irq_rx(int irq, void *cookie)
{ … }

static irqreturn_t wil6210_irq_rx_edma(int irq, void *cookie)
{ … }

static irqreturn_t wil6210_irq_tx_edma(int irq, void *cookie)
{ … }

static irqreturn_t wil6210_irq_tx(int irq, void *cookie)
{ … }

static void wil_notify_fw_error(struct wil6210_priv *wil)
{ … }

static void wil_cache_mbox_regs(struct wil6210_priv *wil)
{ … }

static bool wil_validate_mbox_regs(struct wil6210_priv *wil)
{ … }

static irqreturn_t wil6210_irq_misc(int irq, void *cookie)
{ … }

static irqreturn_t wil6210_irq_misc_thread(int irq, void *cookie)
{ … }

/* thread IRQ handler */
static irqreturn_t wil6210_thread_irq(int irq, void *cookie)
{ … }

/* DEBUG
 * There is subtle bug in hardware that causes IRQ to raise when it should be
 * masked. It is quite rare and hard to debug.
 *
 * Catch irq issue if it happens and print all I can.
 */
static int wil6210_debug_irq_mask(struct wil6210_priv *wil, u32 pseudo_cause)
{ … }

static irqreturn_t wil6210_hardirq(int irq, void *cookie)
{ … }

static int wil6210_request_3msi(struct wil6210_priv *wil, int irq)
{ … }

/* can't use wil_ioread32_and_clear because ICC value is not set yet */
static inline void wil_clear32(void __iomem *addr)
{ … }

void wil6210_clear_irq(struct wil6210_priv *wil)
{ … }

void wil6210_set_halp(struct wil6210_priv *wil)
{ … }

void wil6210_clear_halp(struct wil6210_priv *wil)
{ … }

int wil6210_init_irq(struct wil6210_priv *wil, int irq)
{ … }

void wil6210_fini_irq(struct wil6210_priv *wil, int irq)
{ … }