/* SPDX-License-Identifier: ISC */ /* * Copyright (c) 2005-2011 Atheros Communications Inc. * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. * Copyright (c) 2018 The Linux Foundation. All rights reserved. */ #ifndef _CE_H_ #define _CE_H_ #include "hif.h" #define CE_HTT_H2T_MSG_SRC_NENTRIES … /* Descriptor rings must be aligned to this boundary */ #define CE_DESC_RING_ALIGN … #define CE_SEND_FLAG_GATHER … /* * Copy Engine support: low-level Target-side Copy Engine API. * This is a hardware access layer used by code that understands * how to use copy engines. */ struct ath10k_ce_pipe; #define CE_DESC_FLAGS_GATHER … #define CE_DESC_FLAGS_BYTE_SWAP … #define CE_WCN3990_DESC_FLAGS_GATHER … #define CE_DESC_ADDR_MASK … #define CE_DESC_ADDR_HI_MASK … /* Following desc flags are used in QCA99X0 */ #define CE_DESC_FLAGS_HOST_INT_DIS … #define CE_DESC_FLAGS_TGT_INT_DIS … #define CE_DESC_FLAGS_META_DATA_MASK … #define CE_DESC_FLAGS_META_DATA_LSB … #define CE_DDR_RRI_MASK … #define CE_DDR_DRRI_SHIFT … struct ce_desc { … }; struct ce_desc_64 { … }; #define CE_DESC_SIZE … #define CE_DESC_SIZE_64 … struct ath10k_ce_ring { … }; struct ath10k_ce_pipe { … }; /* Copy Engine settable attributes */ struct ce_attr; struct ath10k_bus_ops { … }; static inline struct ath10k_ce *ath10k_ce_priv(struct ath10k *ar) { … } struct ath10k_ce { … }; /*==================Send====================*/ /* ath10k_ce_send flags */ #define CE_SEND_FLAG_BYTE_SWAP … /* * Queue a source buffer to be sent to an anonymous destination buffer. * ce - which copy engine to use * buffer - address of buffer * nbytes - number of bytes to send * transfer_id - arbitrary ID; reflected to destination * flags - CE_SEND_FLAG_* values * Returns 0 on success; otherwise an error status. * * Note: If no flags are specified, use CE's default data swap mode. * * Implementation note: pushes 1 buffer to Source ring */ int ath10k_ce_send(struct ath10k_ce_pipe *ce_state, void *per_transfer_send_context, dma_addr_t buffer, unsigned int nbytes, /* 14 bits */ unsigned int transfer_id, unsigned int flags); int ath10k_ce_send_nolock(struct ath10k_ce_pipe *ce_state, void *per_transfer_context, dma_addr_t buffer, unsigned int nbytes, unsigned int transfer_id, unsigned int flags); void __ath10k_ce_send_revert(struct ath10k_ce_pipe *pipe); int ath10k_ce_num_free_src_entries(struct ath10k_ce_pipe *pipe); /*==================Recv=======================*/ int __ath10k_ce_rx_num_free_bufs(struct ath10k_ce_pipe *pipe); int ath10k_ce_rx_post_buf(struct ath10k_ce_pipe *pipe, void *ctx, dma_addr_t paddr); void ath10k_ce_rx_update_write_idx(struct ath10k_ce_pipe *pipe, u32 nentries); /* recv flags */ /* Data is byte-swapped */ #define CE_RECV_FLAG_SWAPPED … /* * Supply data for the next completed unprocessed receive descriptor. * Pops buffer from Dest ring. */ int ath10k_ce_completed_recv_next(struct ath10k_ce_pipe *ce_state, void **per_transfer_contextp, unsigned int *nbytesp); /* * Supply data for the next completed unprocessed send descriptor. * Pops 1 completed send buffer from Source ring. */ int ath10k_ce_completed_send_next(struct ath10k_ce_pipe *ce_state, void **per_transfer_contextp); int ath10k_ce_completed_send_next_nolock(struct ath10k_ce_pipe *ce_state, void **per_transfer_contextp); /*==================CE Engine Initialization=======================*/ int ath10k_ce_init_pipe(struct ath10k *ar, unsigned int ce_id, const struct ce_attr *attr); void ath10k_ce_deinit_pipe(struct ath10k *ar, unsigned int ce_id); int ath10k_ce_alloc_pipe(struct ath10k *ar, int ce_id, const struct ce_attr *attr); void ath10k_ce_free_pipe(struct ath10k *ar, int ce_id); /*==================CE Engine Shutdown=======================*/ /* * Support clean shutdown by allowing the caller to revoke * receive buffers. Target DMA must be stopped before using * this API. */ int ath10k_ce_revoke_recv_next(struct ath10k_ce_pipe *ce_state, void **per_transfer_contextp, dma_addr_t *bufferp); int ath10k_ce_completed_recv_next_nolock(struct ath10k_ce_pipe *ce_state, void **per_transfer_contextp, unsigned int *nbytesp); /* * Support clean shutdown by allowing the caller to cancel * pending sends. Target DMA must be stopped before using * this API. */ int ath10k_ce_cancel_send_next(struct ath10k_ce_pipe *ce_state, void **per_transfer_contextp, dma_addr_t *bufferp, unsigned int *nbytesp, unsigned int *transfer_idp); /*==================CE Interrupt Handlers====================*/ void ath10k_ce_per_engine_service_any(struct ath10k *ar); void ath10k_ce_per_engine_service(struct ath10k *ar, unsigned int ce_id); void ath10k_ce_disable_interrupt(struct ath10k *ar, int ce_id); void ath10k_ce_disable_interrupts(struct ath10k *ar); void ath10k_ce_enable_interrupt(struct ath10k *ar, int ce_id); void ath10k_ce_enable_interrupts(struct ath10k *ar); void ath10k_ce_dump_registers(struct ath10k *ar, struct ath10k_fw_crash_data *crash_data); void ath10k_ce_alloc_rri(struct ath10k *ar); void ath10k_ce_free_rri(struct ath10k *ar); /* ce_attr.flags values */ /* Use NonSnooping PCIe accesses? */ #define CE_ATTR_NO_SNOOP … /* Byte swap data words */ #define CE_ATTR_BYTE_SWAP_DATA … /* Swizzle descriptors? */ #define CE_ATTR_SWIZZLE_DESCRIPTORS … /* no interrupt on copy completion */ #define CE_ATTR_DIS_INTR … /* no interrupt, only polling */ #define CE_ATTR_POLL … /* Attributes of an instance of a Copy Engine */ struct ce_attr { … }; struct ath10k_ce_ops { … }; static inline u32 ath10k_ce_base_address(struct ath10k *ar, unsigned int ce_id) { … } #define COPY_ENGINE_ID(COPY_ENGINE_BASE_ADDRESS) … #define CE_SRC_RING_TO_DESC(baddr, idx) … #define CE_DEST_RING_TO_DESC(baddr, idx) … #define CE_SRC_RING_TO_DESC_64(baddr, idx) … #define CE_DEST_RING_TO_DESC_64(baddr, idx) … /* Ring arithmetic (modulus number of entries in ring, which is a pwr of 2). */ #define CE_RING_DELTA(nentries_mask, fromidx, toidx) … #define CE_RING_IDX_INCR(nentries_mask, idx) … #define CE_RING_IDX_ADD(nentries_mask, idx, num) … #define CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_LSB … #define CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_MASK … #define CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_GET(x) … #define CE_WRAPPER_INTERRUPT_SUMMARY_ADDRESS … static inline u32 ath10k_ce_interrupt_summary(struct ath10k *ar) { … } /* Host software's Copy Engine configuration. */ #define CE_ATTR_FLAGS … /* * Configuration information for a Copy Engine pipe. * Passed from Host to Target during startup (one per CE). * * NOTE: Structure is shared between Host software and Target firmware! */ struct ce_pipe_config { … }; /* * Directions for interconnect pipe configuration. * These definitions may be used during configuration and are shared * between Host and Target. * * Pipe Directions are relative to the Host, so PIPEDIR_IN means * "coming IN over air through Target to Host" as with a WiFi Rx operation. * Conversely, PIPEDIR_OUT means "going OUT from Host through Target over air" * as with a WiFi Tx operation. This is somewhat awkward for the "middle-man" * Target since things that are "PIPEDIR_OUT" are coming IN to the Target * over the interconnect. */ #define PIPEDIR_NONE … #define PIPEDIR_IN … #define PIPEDIR_OUT … #define PIPEDIR_INOUT … /* Establish a mapping between a service/direction and a pipe. */ struct ce_service_to_pipe { … }; #endif /* _CE_H_ */
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