linux/drivers/net/wireless/ath/ath10k/ahb.c

// SPDX-License-Identifier: ISC
/*
 * Copyright (c) 2016-2017 Qualcomm Atheros, Inc. All rights reserved.
 * Copyright (c) 2015 The Linux Foundation. All rights reserved.
 */
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/reset.h>
#include "core.h"
#include "debug.h"
#include "pci.h"
#include "ahb.h"

static const struct of_device_id ath10k_ahb_of_match[] =;

MODULE_DEVICE_TABLE(of, ath10k_ahb_of_match);

#define QCA4019_SRAM_ADDR
#define QCA4019_SRAM_LEN

static inline struct ath10k_ahb *ath10k_ahb_priv(struct ath10k *ar)
{}

static void ath10k_ahb_write32(struct ath10k *ar, u32 offset, u32 value)
{}

static u32 ath10k_ahb_read32(struct ath10k *ar, u32 offset)
{}

static u32 ath10k_ahb_gcc_read32(struct ath10k *ar, u32 offset)
{}

static void ath10k_ahb_tcsr_write32(struct ath10k *ar, u32 offset, u32 value)
{}

static u32 ath10k_ahb_tcsr_read32(struct ath10k *ar, u32 offset)
{}

static u32 ath10k_ahb_soc_read32(struct ath10k *ar, u32 addr)
{}

static int ath10k_ahb_get_num_banks(struct ath10k *ar)
{}

static int ath10k_ahb_clock_init(struct ath10k *ar)
{}

static void ath10k_ahb_clock_deinit(struct ath10k *ar)
{}

static int ath10k_ahb_clock_enable(struct ath10k *ar)
{}

static void ath10k_ahb_clock_disable(struct ath10k *ar)
{}

static int ath10k_ahb_rst_ctrl_init(struct ath10k *ar)
{}

static void ath10k_ahb_rst_ctrl_deinit(struct ath10k *ar)
{}

static int ath10k_ahb_release_reset(struct ath10k *ar)
{}

static void ath10k_ahb_halt_axi_bus(struct ath10k *ar, u32 haltreq_reg,
				    u32 haltack_reg)
{}

static void ath10k_ahb_halt_chip(struct ath10k *ar)
{}

static irqreturn_t ath10k_ahb_interrupt_handler(int irq, void *arg)
{}

static int ath10k_ahb_request_irq_intx(struct ath10k *ar)
{}

static void ath10k_ahb_release_irq_intx(struct ath10k *ar)
{}

static void ath10k_ahb_irq_disable(struct ath10k *ar)
{}

static int ath10k_ahb_resource_init(struct ath10k *ar)
{}

static void ath10k_ahb_resource_deinit(struct ath10k *ar)
{}

static int ath10k_ahb_prepare_device(struct ath10k *ar)
{}

static int ath10k_ahb_chip_reset(struct ath10k *ar)
{}

static int ath10k_ahb_wake_target_cpu(struct ath10k *ar)
{}

static int ath10k_ahb_hif_start(struct ath10k *ar)
{}

static void ath10k_ahb_hif_stop(struct ath10k *ar)
{}

static int ath10k_ahb_hif_power_up(struct ath10k *ar,
				   enum ath10k_firmware_mode fw_mode)
{}

static u32 ath10k_ahb_qca4019_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr)
{}

static const struct ath10k_hif_ops ath10k_ahb_hif_ops =;

static const struct ath10k_bus_ops ath10k_ahb_bus_ops =;

static int ath10k_ahb_probe(struct platform_device *pdev)
{}

static void ath10k_ahb_remove(struct platform_device *pdev)
{}

static struct platform_driver ath10k_ahb_driver =;

int ath10k_ahb_init(void)
{}

void ath10k_ahb_exit(void)
{}