/* SPDX-License-Identifier: BSD-3-Clause-Clear */ /* * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef ATH12K_DP_H #define ATH12K_DP_H #include "hal_rx.h" #include "hw.h" #define MAX_RXDMA_PER_PDEV … struct ath12k_base; struct ath12k_peer; struct ath12k_dp; struct ath12k_vif; struct hal_tcl_status_ring; struct ath12k_ext_irq_grp; #define DP_MON_PURGE_TIMEOUT_MS … #define DP_MON_SERVICE_BUDGET … struct dp_srng { … }; struct dp_rxdma_mon_ring { … }; struct dp_rxdma_ring { … }; #define ATH12K_TX_COMPL_NEXT(x) … struct dp_tx_ring { … }; struct ath12k_pdev_mon_stats { … }; struct dp_link_desc_bank { … }; /* Size to enforce scatter idle list mode */ #define DP_LINK_DESC_ALLOC_SIZE_THRESH … #define DP_LINK_DESC_BANKS_MAX … #define DP_LINK_DESC_START … #define DP_LINK_DESC_SHIFT … #define DP_LINK_DESC_COOKIE_SET(id, page) … #define DP_LINK_DESC_BANK_MASK … #define DP_RX_DESC_COOKIE_INDEX_MAX … #define DP_RX_DESC_COOKIE_POOL_ID_MAX … #define DP_RX_DESC_COOKIE_MAX … #define DP_NOT_PPDU_ID_WRAP_AROUND … enum ath12k_dp_ppdu_state { … }; struct dp_mon_mpdu { … }; #define DP_MON_MAX_STATUS_BUF … struct ath12k_mon_data { … }; struct ath12k_pdev_dp { … }; #define DP_NUM_CLIENTS_MAX … #define DP_AVG_TIDS_PER_CLIENT … #define DP_NUM_TIDS_MAX … #define DP_AVG_MSDUS_PER_FLOW … #define DP_AVG_FLOWS_PER_TID … #define DP_AVG_MPDUS_PER_TID_MAX … #define DP_AVG_MSDUS_PER_MPDU … #define DP_RX_HASH_ENABLE … #define DP_BA_WIN_SZ_MAX … #define DP_TCL_NUM_RING_MAX … #define DP_IDLE_SCATTER_BUFS_MAX … #define DP_WBM_RELEASE_RING_SIZE … #define DP_TCL_DATA_RING_SIZE … #define DP_TX_COMP_RING_SIZE … #define DP_TX_IDR_SIZE … #define DP_TCL_CMD_RING_SIZE … #define DP_TCL_STATUS_RING_SIZE … #define DP_REO_DST_RING_MAX … #define DP_REO_DST_RING_SIZE … #define DP_REO_REINJECT_RING_SIZE … #define DP_RX_RELEASE_RING_SIZE … #define DP_REO_EXCEPTION_RING_SIZE … #define DP_REO_CMD_RING_SIZE … #define DP_REO_STATUS_RING_SIZE … #define DP_RXDMA_BUF_RING_SIZE … #define DP_RX_MAC_BUF_RING_SIZE … #define DP_RXDMA_REFILL_RING_SIZE … #define DP_RXDMA_ERR_DST_RING_SIZE … #define DP_RXDMA_MON_STATUS_RING_SIZE … #define DP_RXDMA_MONITOR_BUF_RING_SIZE … #define DP_RXDMA_MONITOR_DST_RING_SIZE … #define DP_RXDMA_MONITOR_DESC_RING_SIZE … #define DP_TX_MONITOR_BUF_RING_SIZE … #define DP_TX_MONITOR_DEST_RING_SIZE … #define DP_TX_MONITOR_BUF_SIZE … #define DP_TX_MONITOR_BUF_SIZE_MIN … #define DP_TX_MONITOR_BUF_SIZE_MAX … #define DP_RX_BUFFER_SIZE … #define DP_RX_BUFFER_SIZE_LITE … #define DP_RX_BUFFER_ALIGN_SIZE … #define DP_RXDMA_BUF_COOKIE_BUF_ID … #define DP_RXDMA_BUF_COOKIE_PDEV_ID … #define DP_HW2SW_MACID(mac_id) … #define DP_SW2HW_MACID(mac_id) … #define DP_TX_DESC_ID_MAC_ID … #define DP_TX_DESC_ID_MSDU_ID … #define DP_TX_DESC_ID_POOL_ID … #define ATH12K_SHADOW_DP_TIMER_INTERVAL … #define ATH12K_SHADOW_CTRL_TIMER_INTERVAL … #define ATH12K_NUM_POOL_TX_DESC … /* TODO: revisit this count during testing */ #define ATH12K_RX_DESC_COUNT … #define ATH12K_PAGE_SIZE … /* Total 1024 entries in PPT, i.e 4K/4 considering 4K aligned * SPT pages which makes lower 12bits 0 */ #define ATH12K_MAX_PPT_ENTRIES … /* Total 512 entries in a SPT, i.e 4K Page/8 */ #define ATH12K_MAX_SPT_ENTRIES … #define ATH12K_NUM_RX_SPT_PAGES … #define ATH12K_TX_SPT_PAGES_PER_POOL … #define ATH12K_NUM_TX_SPT_PAGES … #define ATH12K_NUM_SPT_PAGES … #define ATH12K_TX_SPT_PAGE_OFFSET … #define ATH12K_RX_SPT_PAGE_OFFSET … /* The SPT pages are divided for RX and TX, first block for RX * and remaining for TX */ #define ATH12K_NUM_TX_SPT_PAGE_START … #define ATH12K_DP_RX_DESC_MAGIC … /* 4K aligned address have last 12 bits set to 0, this check is done * so that two spt pages address can be stored per 8bytes * of CMEM (PPT) */ #define ATH12K_SPT_4K_ALIGN_CHECK … #define ATH12K_SPT_4K_ALIGN_OFFSET … #define ATH12K_PPT_ADDR_OFFSET(ppt_index) … /* To indicate HW of CMEM address, b0-31 are cmem base received via QMI */ #define ATH12K_CMEM_ADDR_MSB … /* Of 20 bits cookie, b0-b8 is to indicate SPT offset and b9-19 for PPT */ #define ATH12K_CC_SPT_MSB … #define ATH12K_CC_PPT_MSB … #define ATH12K_CC_PPT_SHIFT … #define ATH12K_DP_CC_COOKIE_SPT … #define ATH12K_DP_CC_COOKIE_PPT … #define DP_REO_QREF_NUM … #define DP_MAX_PEER_ID … /* Total size of the LUT is based on 2K peers, each having reference * for 17tids, note each entry is of type ath12k_reo_queue_ref * hence total size is 2048 * 17 * 8 = 278528 */ #define DP_REOQ_LUT_SIZE … /* Invalid TX Bank ID value */ #define DP_INVALID_BANK_ID … struct ath12k_dp_tx_bank_profile { … }; struct ath12k_hp_update_timer { … }; struct ath12k_rx_desc_info { … }; struct ath12k_tx_desc_info { … }; struct ath12k_spt_info { … }; struct ath12k_reo_queue_ref { … } __packed; struct ath12k_reo_q_addr_lut { … }; struct ath12k_dp { … }; /* HTT definitions */ #define HTT_TCL_META_DATA_TYPE … #define HTT_TCL_META_DATA_VALID_HTT … /* vdev meta data */ #define HTT_TCL_META_DATA_VDEV_ID … #define HTT_TCL_META_DATA_PDEV_ID … #define HTT_TCL_META_DATA_HOST_INSPECTED … /* peer meta data */ #define HTT_TCL_META_DATA_PEER_ID … /* HTT tx completion is overlaid in wbm_release_ring */ #define HTT_TX_WBM_COMP_INFO0_STATUS … #define HTT_TX_WBM_COMP_INFO1_REINJECT_REASON … #define HTT_TX_WBM_COMP_INFO1_EXCEPTION_FRAME … #define HTT_TX_WBM_COMP_INFO2_ACK_RSSI … struct htt_tx_wbm_completion { … } __packed; enum htt_h2t_msg_type { … }; #define HTT_VER_REQ_INFO_MSG_ID … struct htt_ver_req_cmd { … } __packed; enum htt_srng_ring_type { … }; enum htt_srng_ring_id { … }; /* host -> target HTT_SRING_SETUP message * * After target is booted up, Host can send SRING setup message for * each host facing LMAC SRING. Target setups up HW registers based * on setup message and confirms back to Host if response_required is set. * Host should wait for confirmation message before sending new SRING * setup message * * The message would appear as follows: * * |31 24|23 20|19|18 16|15|14 8|7 0| * |--------------- +-----------------+----------------+------------------| * | ring_type | ring_id | pdev_id | msg_type | * |----------------------------------------------------------------------| * | ring_base_addr_lo | * |----------------------------------------------------------------------| * | ring_base_addr_hi | * |----------------------------------------------------------------------| * |ring_misc_cfg_flag|ring_entry_size| ring_size | * |----------------------------------------------------------------------| * | ring_head_offset32_remote_addr_lo | * |----------------------------------------------------------------------| * | ring_head_offset32_remote_addr_hi | * |----------------------------------------------------------------------| * | ring_tail_offset32_remote_addr_lo | * |----------------------------------------------------------------------| * | ring_tail_offset32_remote_addr_hi | * |----------------------------------------------------------------------| * | ring_msi_addr_lo | * |----------------------------------------------------------------------| * | ring_msi_addr_hi | * |----------------------------------------------------------------------| * | ring_msi_data | * |----------------------------------------------------------------------| * | intr_timer_th |IM| intr_batch_counter_th | * |----------------------------------------------------------------------| * | reserved |RR|PTCF| intr_low_threshold | * |----------------------------------------------------------------------| * Where * IM = sw_intr_mode * RR = response_required * PTCF = prefetch_timer_cfg * * The message is interpreted as follows: * dword0 - b'0:7 - msg_type: This will be set to * HTT_H2T_MSG_TYPE_SRING_SETUP * b'8:15 - pdev_id: * 0 (for rings at SOC/UMAC level), * 1/2/3 mac id (for rings at LMAC level) * b'16:23 - ring_id: identify which ring is to setup, * more details can be got from enum htt_srng_ring_id * b'24:31 - ring_type: identify type of host rings, * more details can be got from enum htt_srng_ring_type * dword1 - b'0:31 - ring_base_addr_lo: Lower 32bits of ring base address * dword2 - b'0:31 - ring_base_addr_hi: Upper 32bits of ring base address * dword3 - b'0:15 - ring_size: size of the ring in unit of 4-bytes words * b'16:23 - ring_entry_size: Size of each entry in 4-byte word units * b'24:31 - ring_misc_cfg_flag: Valid only for HW_TO_SW_RING and * SW_TO_HW_RING. * Refer to HTT_SRING_SETUP_RING_MISC_CFG_RING defs. * dword4 - b'0:31 - ring_head_off32_remote_addr_lo: * Lower 32 bits of memory address of the remote variable * storing the 4-byte word offset that identifies the head * element within the ring. * (The head offset variable has type u32.) * Valid for HW_TO_SW and SW_TO_SW rings. * dword5 - b'0:31 - ring_head_off32_remote_addr_hi: * Upper 32 bits of memory address of the remote variable * storing the 4-byte word offset that identifies the head * element within the ring. * (The head offset variable has type u32.) * Valid for HW_TO_SW and SW_TO_SW rings. * dword6 - b'0:31 - ring_tail_off32_remote_addr_lo: * Lower 32 bits of memory address of the remote variable * storing the 4-byte word offset that identifies the tail * element within the ring. * (The tail offset variable has type u32.) * Valid for HW_TO_SW and SW_TO_SW rings. * dword7 - b'0:31 - ring_tail_off32_remote_addr_hi: * Upper 32 bits of memory address of the remote variable * storing the 4-byte word offset that identifies the tail * element within the ring. * (The tail offset variable has type u32.) * Valid for HW_TO_SW and SW_TO_SW rings. * dword8 - b'0:31 - ring_msi_addr_lo: Lower 32bits of MSI cfg address * valid only for HW_TO_SW_RING and SW_TO_HW_RING * dword9 - b'0:31 - ring_msi_addr_hi: Upper 32bits of MSI cfg address * valid only for HW_TO_SW_RING and SW_TO_HW_RING * dword10 - b'0:31 - ring_msi_data: MSI data * Refer to HTT_SRING_SETUP_RING_MSC_CFG_xxx defs * valid only for HW_TO_SW_RING and SW_TO_HW_RING * dword11 - b'0:14 - intr_batch_counter_th: * batch counter threshold is in units of 4-byte words. * HW internally maintains and increments batch count. * (see SRING spec for detail description). * When batch count reaches threshold value, an interrupt * is generated by HW. * b'15 - sw_intr_mode: * This configuration shall be static. * Only programmed at power up. * 0: generate pulse style sw interrupts * 1: generate level style sw interrupts * b'16:31 - intr_timer_th: * The timer init value when timer is idle or is * initialized to start downcounting. * In 8us units (to cover a range of 0 to 524 ms) * dword12 - b'0:15 - intr_low_threshold: * Used only by Consumer ring to generate ring_sw_int_p. * Ring entries low threshold water mark, that is used * in combination with the interrupt timer as well as * the clearing of the level interrupt. * b'16:18 - prefetch_timer_cfg: * Used only by Consumer ring to set timer mode to * support Application prefetch handling. * The external tail offset/pointer will be updated * at following intervals: * 3'b000: (Prefetch feature disabled; used only for debug) * 3'b001: 1 usec * 3'b010: 4 usec * 3'b011: 8 usec (default) * 3'b100: 16 usec * Others: Reserved * b'19 - response_required: * Host needs HTT_T2H_MSG_TYPE_SRING_SETUP_DONE as response * b'20:31 - reserved: reserved for future use */ #define HTT_SRNG_SETUP_CMD_INFO0_MSG_TYPE … #define HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID … #define HTT_SRNG_SETUP_CMD_INFO0_RING_ID … #define HTT_SRNG_SETUP_CMD_INFO0_RING_TYPE … #define HTT_SRNG_SETUP_CMD_INFO1_RING_SIZE … #define HTT_SRNG_SETUP_CMD_INFO1_RING_ENTRY_SIZE … #define HTT_SRNG_SETUP_CMD_INFO1_RING_LOOP_CNT_DIS … #define HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_MSI_SWAP … #define HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_HOST_FW_SWAP … #define HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_TLV_SWAP … #define HTT_SRNG_SETUP_CMD_INTR_INFO_BATCH_COUNTER_THRESH … #define HTT_SRNG_SETUP_CMD_INTR_INFO_SW_INTR_MODE … #define HTT_SRNG_SETUP_CMD_INTR_INFO_INTR_TIMER_THRESH … #define HTT_SRNG_SETUP_CMD_INFO2_INTR_LOW_THRESH … #define HTT_SRNG_SETUP_CMD_INFO2_PRE_FETCH_TIMER_CFG … #define HTT_SRNG_SETUP_CMD_INFO2_RESPONSE_REQUIRED … struct htt_srng_setup_cmd { … } __packed; /* host -> target FW PPDU_STATS config message * * @details * The following field definitions describe the format of the HTT host * to target FW for PPDU_STATS_CFG msg. * The message allows the host to configure the PPDU_STATS_IND messages * produced by the target. * * |31 24|23 16|15 8|7 0| * |-----------------------------------------------------------| * | REQ bit mask | pdev_mask | msg type | * |-----------------------------------------------------------| * Header fields: * - MSG_TYPE * Bits 7:0 * Purpose: identifies this is a req to configure ppdu_stats_ind from target * Value: 0x11 * - PDEV_MASK * Bits 8:15 * Purpose: identifies which pdevs this PPDU stats configuration applies to * Value: This is a overloaded field, refer to usage and interpretation of * PDEV in interface document. * Bit 8 : Reserved for SOC stats * Bit 9 - 15 : Indicates PDEV_MASK in DBDC * Indicates MACID_MASK in DBS * - REQ_TLV_BIT_MASK * Bits 16:31 * Purpose: each set bit indicates the corresponding PPDU stats TLV type * needs to be included in the target's PPDU_STATS_IND messages. * Value: refer htt_ppdu_stats_tlv_tag_t <<<??? * */ struct htt_ppdu_stats_cfg_cmd { … } __packed; #define HTT_PPDU_STATS_CFG_MSG_TYPE … #define HTT_PPDU_STATS_CFG_PDEV_ID … #define HTT_PPDU_STATS_CFG_TLV_TYPE_BITMASK … enum htt_ppdu_stats_tag_type { … }; #define HTT_PPDU_STATS_TAG_DEFAULT … #define HTT_PPDU_STATS_TAG_PKTLOG … enum htt_stats_internal_ppdu_frametype { … }; /* HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG Message * * details: * HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG message is sent by host to * configure RXDMA rings. * The configuration is per ring based and includes both packet subtypes * and PPDU/MPDU TLVs. * * The message would appear as follows: * * |31 26|25|24|23 16|15 8|7 0| * |-----------------+----------------+----------------+---------------| * | rsvd1 |PS|SS| ring_id | pdev_id | msg_type | * |-------------------------------------------------------------------| * | rsvd2 | ring_buffer_size | * |-------------------------------------------------------------------| * | packet_type_enable_flags_0 | * |-------------------------------------------------------------------| * | packet_type_enable_flags_1 | * |-------------------------------------------------------------------| * | packet_type_enable_flags_2 | * |-------------------------------------------------------------------| * | packet_type_enable_flags_3 | * |-------------------------------------------------------------------| * | tlv_filter_in_flags | * |-------------------------------------------------------------------| * Where: * PS = pkt_swap * SS = status_swap * The message is interpreted as follows: * dword0 - b'0:7 - msg_type: This will be set to * HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG * b'8:15 - pdev_id: * 0 (for rings at SOC/UMAC level), * 1/2/3 mac id (for rings at LMAC level) * b'16:23 - ring_id : Identify the ring to configure. * More details can be got from enum htt_srng_ring_id * b'24 - status_swap: 1 is to swap status TLV * b'25 - pkt_swap: 1 is to swap packet TLV * b'26:31 - rsvd1: reserved for future use * dword1 - b'0:16 - ring_buffer_size: size of buffers referenced by rx ring, * in byte units. * Valid only for HW_TO_SW_RING and SW_TO_HW_RING * - b'16:31 - rsvd2: Reserved for future use * dword2 - b'0:31 - packet_type_enable_flags_0: * Enable MGMT packet from 0b0000 to 0b1001 * bits from low to high: FP, MD, MO - 3 bits * FP: Filter_Pass * MD: Monitor_Direct * MO: Monitor_Other * 10 mgmt subtypes * 3 bits -> 30 bits * Refer to PKT_TYPE_ENABLE_FLAG0_xxx_MGMT_xxx defs * dword3 - b'0:31 - packet_type_enable_flags_1: * Enable MGMT packet from 0b1010 to 0b1111 * bits from low to high: FP, MD, MO - 3 bits * Refer to PKT_TYPE_ENABLE_FLAG1_xxx_MGMT_xxx defs * dword4 - b'0:31 - packet_type_enable_flags_2: * Enable CTRL packet from 0b0000 to 0b1001 * bits from low to high: FP, MD, MO - 3 bits * Refer to PKT_TYPE_ENABLE_FLAG2_xxx_CTRL_xxx defs * dword5 - b'0:31 - packet_type_enable_flags_3: * Enable CTRL packet from 0b1010 to 0b1111, * MCAST_DATA, UCAST_DATA, NULL_DATA * bits from low to high: FP, MD, MO - 3 bits * Refer to PKT_TYPE_ENABLE_FLAG3_xxx_CTRL_xxx defs * dword6 - b'0:31 - tlv_filter_in_flags: * Filter in Attention/MPDU/PPDU/Header/User tlvs * Refer to CFG_TLV_FILTER_IN_FLAG defs */ #define HTT_RX_RING_SELECTION_CFG_CMD_INFO0_MSG_TYPE … #define HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID … #define HTT_RX_RING_SELECTION_CFG_CMD_INFO0_RING_ID … #define HTT_RX_RING_SELECTION_CFG_CMD_INFO0_SS … #define HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PS … #define HTT_RX_RING_SELECTION_CFG_CMD_INFO1_BUF_SIZE … #define HTT_RX_RING_SELECTION_CFG_CMD_OFFSET_VALID … #define HTT_RX_RING_SELECTION_CFG_RX_PACKET_OFFSET … #define HTT_RX_RING_SELECTION_CFG_RX_HEADER_OFFSET … #define HTT_RX_RING_SELECTION_CFG_RX_MPDU_END_OFFSET … #define HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_OFFSET … #define HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_OFFSET … #define HTT_RX_RING_SELECTION_CFG_RX_MSDU_START_OFFSET … #define HTT_RX_RING_SELECTION_CFG_RX_ATTENTION_OFFSET … #define HTT_RX_RING_SELECTION_CFG_WORD_MASK_COMPACT_SET … #define HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_MASK … #define HTT_RX_RING_SELECTION_CFG_RX_MPDU_END_MASK … #define HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_MASK … enum htt_rx_filter_tlv_flags { … }; enum htt_rx_mgmt_pkt_filter_tlv_flags0 { … }; enum htt_rx_mgmt_pkt_filter_tlv_flags1 { … }; enum htt_rx_ctrl_pkt_filter_tlv_flags2 { … }; enum htt_rx_ctrl_pkt_filter_tlv_flags3 { … }; enum htt_rx_data_pkt_filter_tlv_flasg3 { … }; #define HTT_RX_FP_MGMT_FILTER_FLAGS0 … #define HTT_RX_MD_MGMT_FILTER_FLAGS0 … #define HTT_RX_MO_MGMT_FILTER_FLAGS0 … #define HTT_RX_FP_MGMT_FILTER_FLAGS1 … #define HTT_RX_MD_MGMT_FILTER_FLAGS1 … #define HTT_RX_MO_MGMT_FILTER_FLAGS1 … #define HTT_RX_FP_CTRL_FILTER_FLASG2 … #define HTT_RX_MD_CTRL_FILTER_FLASG2 … #define HTT_RX_MO_CTRL_FILTER_FLASG2 … #define HTT_RX_FP_CTRL_FILTER_FLASG3 … #define HTT_RX_MD_CTRL_FILTER_FLASG3 … #define HTT_RX_MO_CTRL_FILTER_FLASG3 … #define HTT_RX_FP_DATA_FILTER_FLASG3 … #define HTT_RX_MD_DATA_FILTER_FLASG3 … #define HTT_RX_MO_DATA_FILTER_FLASG3 … #define HTT_RX_MON_FP_MGMT_FILTER_FLAGS0 … #define HTT_RX_MON_MO_MGMT_FILTER_FLAGS0 … #define HTT_RX_MON_FP_MGMT_FILTER_FLAGS1 … #define HTT_RX_MON_MO_MGMT_FILTER_FLAGS1 … #define HTT_RX_MON_FP_CTRL_FILTER_FLASG2 … #define HTT_RX_MON_MO_CTRL_FILTER_FLASG2 … #define HTT_RX_MON_FP_CTRL_FILTER_FLASG3 … #define HTT_RX_MON_MO_CTRL_FILTER_FLASG3 … #define HTT_RX_MON_FP_DATA_FILTER_FLASG3 … #define HTT_RX_MON_MO_DATA_FILTER_FLASG3 … #define HTT_RX_MON_FILTER_TLV_FLAGS … #define HTT_RX_MON_FILTER_TLV_FLAGS_MON_STATUS_RING … #define HTT_RX_MON_FILTER_TLV_FLAGS_MON_BUF_RING … /* msdu start. mpdu end, attention, rx hdr tlv's are not subscribed */ #define HTT_RX_TLV_FLAGS_RXDMA_RING … #define HTT_TX_RING_SELECTION_CFG_CMD_INFO0_MSG_TYPE … #define HTT_TX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID … struct htt_rx_ring_selection_cfg_cmd { … } __packed; struct htt_rx_ring_tlv_filter { … }; #define HTT_STATS_FRAME_CTRL_TYPE_MGMT … #define HTT_STATS_FRAME_CTRL_TYPE_CTRL … #define HTT_STATS_FRAME_CTRL_TYPE_DATA … #define HTT_STATS_FRAME_CTRL_TYPE_RESV … #define HTT_TX_RING_SELECTION_CFG_CMD_INFO0_MSG_TYPE … #define HTT_TX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID … #define HTT_TX_RING_SELECTION_CFG_CMD_INFO0_RING_ID … #define HTT_TX_RING_SELECTION_CFG_CMD_INFO0_SS … #define HTT_TX_RING_SELECTION_CFG_CMD_INFO0_PS … #define HTT_TX_RING_SELECTION_CFG_CMD_INFO1_RING_BUFF_SIZE … #define HTT_TX_RING_SELECTION_CFG_CMD_INFO1_PKT_TYPE … #define HTT_TX_RING_SELECTION_CFG_CMD_INFO1_CONF_LEN_MGMT … #define HTT_TX_RING_SELECTION_CFG_CMD_INFO1_CONF_LEN_CTRL … #define HTT_TX_RING_SELECTION_CFG_CMD_INFO1_CONF_LEN_DATA … #define HTT_TX_RING_SELECTION_CFG_CMD_INFO2_PKT_TYPE_EN_FLAG … struct htt_tx_ring_selection_cfg_cmd { … } __packed; #define HTT_TX_RING_TLV_FILTER_MGMT_DMA_LEN … #define HTT_TX_RING_TLV_FILTER_CTRL_DMA_LEN … #define HTT_TX_RING_TLV_FILTER_DATA_DMA_LEN … #define HTT_TX_MON_FILTER_HYBRID_MODE … struct htt_tx_ring_tlv_filter { … } __packed; enum htt_tx_mon_upstream_tlv_flags0 { … }; #define HTT_TX_FILTER_TLV_FLAGS2_TXPCU_PHYTX_OTHER_TRANSMIT_INFO32 … /* HTT message target->host */ enum htt_t2h_msg_type { … }; #define HTT_TARGET_VERSION_MAJOR … #define HTT_T2H_MSG_TYPE … #define HTT_T2H_VERSION_CONF_MINOR … #define HTT_T2H_VERSION_CONF_MAJOR … struct htt_t2h_version_conf_msg { … } __packed; #define HTT_T2H_PEER_MAP_INFO_VDEV_ID … #define HTT_T2H_PEER_MAP_INFO_PEER_ID … #define HTT_T2H_PEER_MAP_INFO1_MAC_ADDR_H16 … #define HTT_T2H_PEER_MAP_INFO1_HW_PEER_ID … #define HTT_T2H_PEER_MAP_INFO2_AST_HASH_VAL … #define HTT_T2H_PEER_MAP_INFO2_NEXT_HOP_M … #define HTT_T2H_PEER_MAP_INFO2_NEXT_HOP_S … struct htt_t2h_peer_map_event { … } __packed; #define HTT_T2H_PEER_UNMAP_INFO_VDEV_ID … #define HTT_T2H_PEER_UNMAP_INFO_PEER_ID … #define HTT_T2H_PEER_UNMAP_INFO1_MAC_ADDR_H16 … #define HTT_T2H_PEER_MAP_INFO1_NEXT_HOP_M … #define HTT_T2H_PEER_MAP_INFO1_NEXT_HOP_S … struct htt_t2h_peer_unmap_event { … } __packed; struct htt_resp_msg { … } __packed; #define HTT_VDEV_GET_STATS_U64(msg_l32, msg_u32) … #define HTT_T2H_VDEV_STATS_PERIODIC_MSG_TYPE … #define HTT_T2H_VDEV_STATS_PERIODIC_PDEV_ID … #define HTT_T2H_VDEV_STATS_PERIODIC_NUM_VDEV … #define HTT_T2H_VDEV_STATS_PERIODIC_PAYLOAD_BYTES … #define HTT_VDEV_TXRX_STATS_COMMON_TLV … #define HTT_VDEV_TXRX_STATS_HW_STATS_TLV … struct htt_t2h_vdev_txrx_stats_ind { … } __packed; struct htt_t2h_vdev_common_stats_tlv { … } __packed; /* ppdu stats * * @details * The following field definitions describe the format of the HTT target * to host ppdu stats indication message. * * * |31 16|15 12|11 10|9 8|7 0 | * |----------------------------------------------------------------------| * | payload_size | rsvd |pdev_id|mac_id | msg type | * |----------------------------------------------------------------------| * | ppdu_id | * |----------------------------------------------------------------------| * | Timestamp in us | * |----------------------------------------------------------------------| * | reserved | * |----------------------------------------------------------------------| * | type-specific stats info | * | (see htt_ppdu_stats.h) | * |----------------------------------------------------------------------| * Header fields: * - MSG_TYPE * Bits 7:0 * Purpose: Identifies this is a PPDU STATS indication * message. * Value: 0x1d * - mac_id * Bits 9:8 * Purpose: mac_id of this ppdu_id * Value: 0-3 * - pdev_id * Bits 11:10 * Purpose: pdev_id of this ppdu_id * Value: 0-3 * 0 (for rings at SOC level), * 1/2/3 PDEV -> 0/1/2 * - payload_size * Bits 31:16 * Purpose: total tlv size * Value: payload_size in bytes */ #define HTT_T2H_PPDU_STATS_INFO_PDEV_ID … #define HTT_T2H_PPDU_STATS_INFO_PAYLOAD_SIZE … struct ath12k_htt_ppdu_stats_msg { … } __packed; struct htt_tlv { … } __packed; #define HTT_TLV_TAG … #define HTT_TLV_LEN … enum HTT_PPDU_STATS_BW { … }; #define HTT_PPDU_STATS_CMN_FLAGS_FRAME_TYPE_M … #define HTT_PPDU_STATS_CMN_FLAGS_QUEUE_TYPE_M … /* bw - HTT_PPDU_STATS_BW */ #define HTT_PPDU_STATS_CMN_FLAGS_BW_M … struct htt_ppdu_stats_common { … } __packed; enum htt_ppdu_stats_gi { … }; #define HTT_PPDU_STATS_USER_RATE_INFO0_USER_POS_M … #define HTT_PPDU_STATS_USER_RATE_INFO0_MU_GROUP_ID_M … enum HTT_PPDU_STATS_PPDU_TYPE { … }; #define HTT_PPDU_STATS_USER_RATE_INFO1_RESP_TYPE_VALD_M … #define HTT_PPDU_STATS_USER_RATE_INFO1_PPDU_TYPE_M … #define HTT_PPDU_STATS_USER_RATE_FLAGS_LTF_SIZE_M … #define HTT_PPDU_STATS_USER_RATE_FLAGS_STBC_M … #define HTT_PPDU_STATS_USER_RATE_FLAGS_HE_RE_M … #define HTT_PPDU_STATS_USER_RATE_FLAGS_TXBF_M … #define HTT_PPDU_STATS_USER_RATE_FLAGS_BW_M … #define HTT_PPDU_STATS_USER_RATE_FLAGS_NSS_M … #define HTT_PPDU_STATS_USER_RATE_FLAGS_MCS_M … #define HTT_PPDU_STATS_USER_RATE_FLAGS_PREAMBLE_M … #define HTT_PPDU_STATS_USER_RATE_FLAGS_GI_M … #define HTT_PPDU_STATS_USER_RATE_FLAGS_DCM_M … #define HTT_PPDU_STATS_USER_RATE_FLAGS_LDPC_M … #define HTT_USR_RATE_PREAMBLE(_val) … #define HTT_USR_RATE_BW(_val) … #define HTT_USR_RATE_NSS(_val) … #define HTT_USR_RATE_MCS(_val) … #define HTT_USR_RATE_GI(_val) … #define HTT_USR_RATE_DCM(_val) … #define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_LTF_SIZE_M … #define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_STBC_M … #define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_HE_RE_M … #define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_TXBF_M … #define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_BW_M … #define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_NSS_M … #define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_MCS_M … #define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_PREAMBLE_M … #define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_GI_M … #define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_DCM_M … #define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_LDPC_M … struct htt_ppdu_stats_user_rate { … } __packed; #define HTT_PPDU_STATS_TX_INFO_FLAGS_RATECODE_M … #define HTT_PPDU_STATS_TX_INFO_FLAGS_IS_AMPDU_M … #define HTT_PPDU_STATS_TX_INFO_FLAGS_BA_ACK_FAILED_M … #define HTT_PPDU_STATS_TX_INFO_FLAGS_BW_M … #define HTT_PPDU_STATS_TX_INFO_FLAGS_SGI_M … #define HTT_PPDU_STATS_TX_INFO_FLAGS_PEERID_M … #define HTT_TX_INFO_IS_AMSDU(_flags) … #define HTT_TX_INFO_BA_ACK_FAILED(_flags) … #define HTT_TX_INFO_RATECODE(_flags) … #define HTT_TX_INFO_PEERID(_flags) … struct htt_tx_ppdu_stats_info { … } __packed; enum htt_ppdu_stats_usr_compln_status { … }; #define HTT_PPDU_STATS_USR_CMPLTN_CMN_FLAGS_LONG_RETRY_M … #define HTT_PPDU_STATS_USR_CMPLTN_CMN_FLAGS_SHORT_RETRY_M … #define HTT_PPDU_STATS_USR_CMPLTN_CMN_FLAGS_IS_AMPDU_M … #define HTT_PPDU_STATS_USR_CMPLTN_CMN_FLAGS_RESP_TYPE_M … #define HTT_USR_CMPLTN_IS_AMPDU(_val) … #define HTT_USR_CMPLTN_LONG_RETRY(_val) … #define HTT_USR_CMPLTN_SHORT_RETRY(_val) … struct htt_ppdu_stats_usr_cmpltn_cmn { … } __packed; #define HTT_PPDU_STATS_ACK_BA_INFO_NUM_MPDU_M … #define HTT_PPDU_STATS_ACK_BA_INFO_NUM_MSDU_M … #define HTT_PPDU_STATS_ACK_BA_INFO_TID_NUM … #define HTT_PPDU_STATS_NON_QOS_TID … struct htt_ppdu_stats_usr_cmpltn_ack_ba_status { … } __packed; struct htt_ppdu_user_stats { … }; #define HTT_PPDU_STATS_MAX_USERS … #define HTT_PPDU_DESC_MAX_DEPTH … struct htt_ppdu_stats { … }; struct htt_ppdu_stats_info { … }; /* @brief target -> host MLO offset indiciation message * * @details * The following field definitions describe the format of the HTT target * to host mlo offset indication message. * * * |31 29|28 |26|25 22|21 16|15 13|12 10 |9 8|7 0| * |---------------------------------------------------------------------| * | rsvd1 | mac_freq |chip_id |pdev_id|msgtype| * |---------------------------------------------------------------------| * | sync_timestamp_lo_us | * |---------------------------------------------------------------------| * | sync_timestamp_hi_us | * |---------------------------------------------------------------------| * | mlo_offset_lo | * |---------------------------------------------------------------------| * | mlo_offset_hi | * |---------------------------------------------------------------------| * | mlo_offset_clcks | * |---------------------------------------------------------------------| * | rsvd2 | mlo_comp_clks |mlo_comp_us | * |---------------------------------------------------------------------| * | rsvd3 |mlo_comp_timer | * |---------------------------------------------------------------------| * Header fields * - MSG_TYPE * Bits 7:0 * Purpose: Identifies this is a MLO offset indication msg * - PDEV_ID * Bits 9:8 * Purpose: Pdev of this MLO offset * - CHIP_ID * Bits 12:10 * Purpose: chip_id of this MLO offset * - MAC_FREQ * Bits 28:13 * - SYNC_TIMESTAMP_LO_US * Purpose: clock frequency of the mac HW block in MHz * Bits: 31:0 * Purpose: lower 32 bits of the WLAN global time stamp at which * last sync interrupt was received * - SYNC_TIMESTAMP_HI_US * Bits: 31:0 * Purpose: upper 32 bits of WLAN global time stamp at which * last sync interrupt was received * - MLO_OFFSET_LO * Bits: 31:0 * Purpose: lower 32 bits of the MLO offset in us * - MLO_OFFSET_HI * Bits: 31:0 * Purpose: upper 32 bits of the MLO offset in us * - MLO_COMP_US * Bits: 15:0 * Purpose: MLO time stamp compensation applied in us * - MLO_COMP_CLCKS * Bits: 25:16 * Purpose: MLO time stamp compensation applied in clock ticks * - MLO_COMP_TIMER * Bits: 21:0 * Purpose: Periodic timer at which compensation is applied */ #define HTT_T2H_MLO_OFFSET_INFO_MSG_TYPE … #define HTT_T2H_MLO_OFFSET_INFO_PDEV_ID … struct ath12k_htt_mlo_offset_msg { … } __packed; /* @brief host -> target FW extended statistics retrieve * * @details * The following field definitions describe the format of the HTT host * to target FW extended stats retrieve message. * The message specifies the type of stats the host wants to retrieve. * * |31 24|23 16|15 8|7 0| * |-----------------------------------------------------------| * | reserved | stats type | pdev_mask | msg type | * |-----------------------------------------------------------| * | config param [0] | * |-----------------------------------------------------------| * | config param [1] | * |-----------------------------------------------------------| * | config param [2] | * |-----------------------------------------------------------| * | config param [3] | * |-----------------------------------------------------------| * | reserved | * |-----------------------------------------------------------| * | cookie LSBs | * |-----------------------------------------------------------| * | cookie MSBs | * |-----------------------------------------------------------| * Header fields: * - MSG_TYPE * Bits 7:0 * Purpose: identifies this is a extended stats upload request message * Value: 0x10 * - PDEV_MASK * Bits 8:15 * Purpose: identifies the mask of PDEVs to retrieve stats from * Value: This is a overloaded field, refer to usage and interpretation of * PDEV in interface document. * Bit 8 : Reserved for SOC stats * Bit 9 - 15 : Indicates PDEV_MASK in DBDC * Indicates MACID_MASK in DBS * - STATS_TYPE * Bits 23:16 * Purpose: identifies which FW statistics to upload * Value: Defined by htt_dbg_ext_stats_type (see htt_stats.h) * - Reserved * Bits 31:24 * - CONFIG_PARAM [0] * Bits 31:0 * Purpose: give an opaque configuration value to the specified stats type * Value: stats-type specific configuration value * Refer to htt_stats.h for interpretation for each stats sub_type * - CONFIG_PARAM [1] * Bits 31:0 * Purpose: give an opaque configuration value to the specified stats type * Value: stats-type specific configuration value * Refer to htt_stats.h for interpretation for each stats sub_type * - CONFIG_PARAM [2] * Bits 31:0 * Purpose: give an opaque configuration value to the specified stats type * Value: stats-type specific configuration value * Refer to htt_stats.h for interpretation for each stats sub_type * - CONFIG_PARAM [3] * Bits 31:0 * Purpose: give an opaque configuration value to the specified stats type * Value: stats-type specific configuration value * Refer to htt_stats.h for interpretation for each stats sub_type * - Reserved [31:0] for future use. * - COOKIE_LSBS * Bits 31:0 * Purpose: Provide a mechanism to match a target->host stats confirmation * message with its preceding host->target stats request message. * Value: LSBs of the opaque cookie specified by the host-side requestor * - COOKIE_MSBS * Bits 31:0 * Purpose: Provide a mechanism to match a target->host stats confirmation * message with its preceding host->target stats request message. * Value: MSBs of the opaque cookie specified by the host-side requestor */ struct htt_ext_stats_cfg_hdr { … } __packed; struct htt_ext_stats_cfg_cmd { … } __packed; /* htt stats config default params */ #define HTT_STAT_DEFAULT_RESET_START_OFFSET … #define HTT_STAT_DEFAULT_CFG0_ALL_HWQS … #define HTT_STAT_DEFAULT_CFG0_ALL_TXQS … #define HTT_STAT_DEFAULT_CFG0_ALL_CMDQS … #define HTT_STAT_DEFAULT_CFG0_ALL_RINGS … #define HTT_STAT_DEFAULT_CFG0_ACTIVE_PEERS … #define HTT_STAT_DEFAULT_CFG0_CCA_CUMULATIVE … #define HTT_STAT_DEFAULT_CFG0_ACTIVE_VDEVS … /* HTT_DBG_EXT_STATS_PEER_INFO * PARAMS: * @config_param0: * [Bit0] - [0] for sw_peer_id, [1] for mac_addr based request * [Bit15 : Bit 1] htt_peer_stats_req_mode_t * [Bit31 : Bit16] sw_peer_id * @config_param1: * peer_stats_req_type_mask:32 (enum htt_peer_stats_tlv_enum) * 0 bit htt_peer_stats_cmn_tlv * 1 bit htt_peer_details_tlv * 2 bit htt_tx_peer_rate_stats_tlv * 3 bit htt_rx_peer_rate_stats_tlv * 4 bit htt_tx_tid_stats_tlv/htt_tx_tid_stats_v1_tlv * 5 bit htt_rx_tid_stats_tlv * 6 bit htt_msdu_flow_stats_tlv * @config_param2: [Bit31 : Bit0] mac_addr31to0 * @config_param3: [Bit15 : Bit0] mac_addr47to32 * [Bit31 : Bit16] reserved */ #define HTT_STAT_PEER_INFO_MAC_ADDR … #define HTT_STAT_DEFAULT_PEER_REQ_TYPE … /* Used to set different configs to the specified stats type.*/ struct htt_ext_stats_cfg_params { … }; enum vdev_stats_offload_timer_duration { … }; static inline void ath12k_dp_get_mac_addr(u32 addr_l32, u16 addr_h16, u8 *addr) { … } int ath12k_dp_service_srng(struct ath12k_base *ab, struct ath12k_ext_irq_grp *irq_grp, int budget); int ath12k_dp_htt_connect(struct ath12k_dp *dp); void ath12k_dp_vdev_tx_attach(struct ath12k *ar, struct ath12k_vif *arvif); void ath12k_dp_free(struct ath12k_base *ab); int ath12k_dp_alloc(struct ath12k_base *ab); void ath12k_dp_cc_config(struct ath12k_base *ab); int ath12k_dp_pdev_alloc(struct ath12k_base *ab); void ath12k_dp_pdev_pre_alloc(struct ath12k_base *ab); void ath12k_dp_pdev_free(struct ath12k_base *ab); int ath12k_dp_tx_htt_srng_setup(struct ath12k_base *ab, u32 ring_id, int mac_id, enum hal_ring_type ring_type); int ath12k_dp_peer_setup(struct ath12k *ar, int vdev_id, const u8 *addr); void ath12k_dp_peer_cleanup(struct ath12k *ar, int vdev_id, const u8 *addr); void ath12k_dp_srng_cleanup(struct ath12k_base *ab, struct dp_srng *ring); int ath12k_dp_srng_setup(struct ath12k_base *ab, struct dp_srng *ring, enum hal_ring_type type, int ring_num, int mac_id, int num_entries); void ath12k_dp_link_desc_cleanup(struct ath12k_base *ab, struct dp_link_desc_bank *desc_bank, u32 ring_type, struct dp_srng *ring); int ath12k_dp_link_desc_setup(struct ath12k_base *ab, struct dp_link_desc_bank *link_desc_banks, u32 ring_type, struct hal_srng *srng, u32 n_link_desc); struct ath12k_rx_desc_info *ath12k_dp_get_rx_desc(struct ath12k_base *ab, u32 cookie); struct ath12k_tx_desc_info *ath12k_dp_get_tx_desc(struct ath12k_base *ab, u32 desc_id); bool ath12k_dp_wmask_compaction_rx_tlv_supported(struct ath12k_base *ab); void ath12k_dp_hal_rx_desc_init(struct ath12k_base *ab); #endif
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