linux/drivers/net/wireless/intel/iwlwifi/pcie/trans.c

// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/*
 * Copyright (C) 2007-2015, 2018-2024 Intel Corporation
 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
 * Copyright (C) 2016-2017 Intel Deutschland GmbH
 */
#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/debugfs.h>
#include <linux/sched.h>
#include <linux/bitops.h>
#include <linux/gfp.h>
#include <linux/vmalloc.h>
#include <linux/module.h>
#include <linux/wait.h>
#include <linux/seq_file.h>

#include "iwl-drv.h"
#include "iwl-trans.h"
#include "iwl-csr.h"
#include "iwl-prph.h"
#include "iwl-scd.h"
#include "iwl-agn-hw.h"
#include "fw/error-dump.h"
#include "fw/dbg.h"
#include "fw/api/tx.h"
#include "mei/iwl-mei.h"
#include "internal.h"
#include "iwl-fh.h"
#include "iwl-context-info-gen3.h"

/* extended range in FW SRAM */
#define IWL_FW_MEM_EXTENDED_START …
#define IWL_FW_MEM_EXTENDED_END …

void iwl_trans_pcie_dump_regs(struct iwl_trans *trans)
{ … }

int iwl_trans_pcie_sw_reset(struct iwl_trans *trans, bool retake_ownership)
{ … }

static void iwl_pcie_free_fw_monitor(struct iwl_trans *trans)
{ … }

static void iwl_pcie_alloc_fw_monitor_block(struct iwl_trans *trans,
					    u8 max_power)
{ … }

void iwl_pcie_alloc_fw_monitor(struct iwl_trans *trans, u8 max_power)
{ … }

static u32 iwl_trans_pcie_read_shr(struct iwl_trans *trans, u32 reg)
{ … }

static void iwl_trans_pcie_write_shr(struct iwl_trans *trans, u32 reg, u32 val)
{ … }

static void iwl_pcie_set_pwr(struct iwl_trans *trans, bool vaux)
{ … }

/* PCI registers */
#define PCI_CFG_RETRY_TIMEOUT …

void iwl_pcie_apm_config(struct iwl_trans *trans)
{ … }

/*
 * Start up NIC's basic functionality after it has been reset
 * (e.g. after platform boot, or shutdown via iwl_pcie_apm_stop())
 * NOTE:  This does not load uCode nor start the embedded processor
 */
static int iwl_pcie_apm_init(struct iwl_trans *trans)
{ … }

/*
 * Enable LP XTAL to avoid HW bug where device may consume much power if
 * FW is not loaded after device reset. LP XTAL is disabled by default
 * after device HW reset. Do it only if XTAL is fed by internal source.
 * Configure device's "persistence" mode to avoid resetting XTAL again when
 * SHRD_HW_RST occurs in S3.
 */
static void iwl_pcie_apm_lp_xtal_enable(struct iwl_trans *trans)
{ … }

void iwl_pcie_apm_stop_master(struct iwl_trans *trans)
{ … }

static void iwl_pcie_apm_stop(struct iwl_trans *trans, bool op_mode_leave)
{ … }

static int iwl_pcie_nic_init(struct iwl_trans *trans)
{ … }

#define HW_READY_TIMEOUT …

/* Note: returns poll_bit return value, which is >= 0 if success */
static int iwl_pcie_set_hw_ready(struct iwl_trans *trans)
{ … }

/* Note: returns standard 0/-ERROR code */
int iwl_pcie_prepare_card_hw(struct iwl_trans *trans)
{ … }

/*
 * ucode
 */
static void iwl_pcie_load_firmware_chunk_fh(struct iwl_trans *trans,
					    u32 dst_addr, dma_addr_t phy_addr,
					    u32 byte_cnt)
{ … }

static int iwl_pcie_load_firmware_chunk(struct iwl_trans *trans,
					u32 dst_addr, dma_addr_t phy_addr,
					u32 byte_cnt)
{ … }

static int iwl_pcie_load_section(struct iwl_trans *trans, u8 section_num,
			    const struct fw_desc *section)
{ … }

static int iwl_pcie_load_cpu_sections_8000(struct iwl_trans *trans,
					   const struct fw_img *image,
					   int cpu,
					   int *first_ucode_section)
{ … }

static int iwl_pcie_load_cpu_sections(struct iwl_trans *trans,
				      const struct fw_img *image,
				      int cpu,
				      int *first_ucode_section)
{ … }

static void iwl_pcie_apply_destination_ini(struct iwl_trans *trans)
{ … }

void iwl_pcie_apply_destination(struct iwl_trans *trans)
{ … }

static int iwl_pcie_load_given_ucode(struct iwl_trans *trans,
				const struct fw_img *image)
{ … }

static int iwl_pcie_load_given_ucode_8000(struct iwl_trans *trans,
					  const struct fw_img *image)
{ … }

bool iwl_pcie_check_hw_rf_kill(struct iwl_trans *trans)
{ … }

struct iwl_causes_list { … };

#define IWL_CAUSE(reg, mask) …

static const struct iwl_causes_list causes_list_common[] = …;

static const struct iwl_causes_list causes_list_pre_bz[] = …;

static const struct iwl_causes_list causes_list_bz[] = …;

static void iwl_pcie_map_list(struct iwl_trans *trans,
			      const struct iwl_causes_list *causes,
			      int arr_size, int val)
{ … }

static void iwl_pcie_map_non_rx_causes(struct iwl_trans *trans)
{ … }

static void iwl_pcie_map_rx_causes(struct iwl_trans *trans)
{ … }

void iwl_pcie_conf_msix_hw(struct iwl_trans_pcie *trans_pcie)
{ … }

static void iwl_pcie_init_msix(struct iwl_trans_pcie *trans_pcie)
{ … }

static void _iwl_trans_pcie_stop_device(struct iwl_trans *trans, bool from_irq)
{ … }

void iwl_pcie_synchronize_irqs(struct iwl_trans *trans)
{ … }

int iwl_trans_pcie_start_fw(struct iwl_trans *trans,
			    const struct fw_img *fw, bool run_in_rfkill)
{ … }

void iwl_trans_pcie_fw_alive(struct iwl_trans *trans, u32 scd_addr)
{ … }

void iwl_trans_pcie_handle_stop_rfkill(struct iwl_trans *trans,
				       bool was_in_rfkill)
{ … }

void iwl_trans_pcie_stop_device(struct iwl_trans *trans)
{ … }

void iwl_trans_pcie_rf_kill(struct iwl_trans *trans, bool state, bool from_irq)
{ … }

void iwl_pcie_d3_complete_suspend(struct iwl_trans *trans,
				  bool test, bool reset)
{ … }

static int iwl_pcie_d3_handshake(struct iwl_trans *trans, bool suspend)
{ … }

int iwl_trans_pcie_d3_suspend(struct iwl_trans *trans, bool test, bool reset)
{ … }

int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
			     enum iwl_d3_status *status,
			     bool test,  bool reset)
{ … }

static void
iwl_pcie_set_interrupt_capa(struct pci_dev *pdev,
			    struct iwl_trans *trans,
			    const struct iwl_cfg_trans_params *cfg_trans)
{ … }

static void iwl_pcie_irq_set_affinity(struct iwl_trans *trans)
{ … }

static int iwl_pcie_init_msix_handler(struct pci_dev *pdev,
				      struct iwl_trans_pcie *trans_pcie)
{ … }

static int iwl_trans_pcie_clear_persistence_bit(struct iwl_trans *trans)
{ … }

static int iwl_pcie_gen2_force_power_gating(struct iwl_trans *trans)
{ … }

static int _iwl_trans_pcie_start_hw(struct iwl_trans *trans)
{ … }

int iwl_trans_pcie_start_hw(struct iwl_trans *trans)
{ … }

void iwl_trans_pcie_op_mode_leave(struct iwl_trans *trans)
{ … }

void iwl_trans_pcie_write8(struct iwl_trans *trans, u32 ofs, u8 val)
{ … }

void iwl_trans_pcie_write32(struct iwl_trans *trans, u32 ofs, u32 val)
{ … }

u32 iwl_trans_pcie_read32(struct iwl_trans *trans, u32 ofs)
{ … }

static u32 iwl_trans_pcie_prph_msk(struct iwl_trans *trans)
{ … }

u32 iwl_trans_pcie_read_prph(struct iwl_trans *trans, u32 reg)
{ … }

void iwl_trans_pcie_write_prph(struct iwl_trans *trans, u32 addr, u32 val)
{ … }

void iwl_trans_pcie_configure(struct iwl_trans *trans,
			      const struct iwl_trans_config *trans_cfg)
{ … }

void iwl_trans_pcie_free_pnvm_dram_regions(struct iwl_dram_regions *dram_regions,
					   struct device *dev)
{ … }

static void iwl_pcie_free_invalid_tx_cmd(struct iwl_trans *trans)
{ … }

static int iwl_pcie_alloc_invalid_tx_cmd(struct iwl_trans *trans)
{ … }

void iwl_trans_pcie_free(struct iwl_trans *trans)
{ … }

struct iwl_trans_pcie_removal { … };

static void iwl_trans_pcie_removal_wk(struct work_struct *wk)
{ … }

void iwl_trans_pcie_remove(struct iwl_trans *trans, bool rescan)
{ … }
EXPORT_SYMBOL(…);

/*
 * This version doesn't disable BHs but rather assumes they're
 * already disabled.
 */
bool __iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans)
{ … }

bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans)
{ … }

void iwl_trans_pcie_release_nic_access(struct iwl_trans *trans)
{ … }

int iwl_trans_pcie_read_mem(struct iwl_trans *trans, u32 addr,
			    void *buf, int dwords)
{ … }

int iwl_trans_pcie_write_mem(struct iwl_trans *trans, u32 addr,
			     const void *buf, int dwords)
{ … }

int iwl_trans_pcie_read_config32(struct iwl_trans *trans, u32 ofs,
				 u32 *val)
{ … }

#define IWL_FLUSH_WAIT_MS …

int iwl_trans_pcie_rxq_dma_data(struct iwl_trans *trans, int queue,
				struct iwl_trans_rxq_dma_data *data)
{ … }

int iwl_trans_pcie_wait_txq_empty(struct iwl_trans *trans, int txq_idx)
{ … }

int iwl_trans_pcie_wait_txqs_empty(struct iwl_trans *trans, u32 txq_bm)
{ … }

void iwl_trans_pcie_set_bits_mask(struct iwl_trans *trans, u32 reg,
				  u32 mask, u32 value)
{ … }

static const char *get_csr_string(int cmd)
{ … }

void iwl_pcie_dump_csr(struct iwl_trans *trans)
{ … }

#ifdef CONFIG_IWLWIFI_DEBUGFS
/* create and remove of files */
#define DEBUGFS_ADD_FILE(name, parent, mode) …

/* file operation */
#define DEBUGFS_READ_FILE_OPS(name) …

#define DEBUGFS_WRITE_FILE_OPS(name) …

#define DEBUGFS_READ_WRITE_FILE_OPS(name) …

struct iwl_dbgfs_tx_queue_priv { … };

struct iwl_dbgfs_tx_queue_state { … };

static void *iwl_dbgfs_tx_queue_seq_start(struct seq_file *seq, loff_t *pos)
{ … }

static void *iwl_dbgfs_tx_queue_seq_next(struct seq_file *seq,
					 void *v, loff_t *pos)
{ … }

static void iwl_dbgfs_tx_queue_seq_stop(struct seq_file *seq, void *v)
{ … }

static int iwl_dbgfs_tx_queue_seq_show(struct seq_file *seq, void *v)
{ … }

static const struct seq_operations iwl_dbgfs_tx_queue_seq_ops = …;

static int iwl_dbgfs_tx_queue_open(struct inode *inode, struct file *filp)
{ … }

static ssize_t iwl_dbgfs_rx_queue_read(struct file *file,
				       char __user *user_buf,
				       size_t count, loff_t *ppos)
{ … }

static ssize_t iwl_dbgfs_interrupt_read(struct file *file,
					char __user *user_buf,
					size_t count, loff_t *ppos)
{ … }

static ssize_t iwl_dbgfs_interrupt_write(struct file *file,
					 const char __user *user_buf,
					 size_t count, loff_t *ppos)
{ … }

static ssize_t iwl_dbgfs_csr_write(struct file *file,
				   const char __user *user_buf,
				   size_t count, loff_t *ppos)
{ … }

static ssize_t iwl_dbgfs_fh_reg_read(struct file *file,
				     char __user *user_buf,
				     size_t count, loff_t *ppos)
{ … }

static ssize_t iwl_dbgfs_rfkill_read(struct file *file,
				     char __user *user_buf,
				     size_t count, loff_t *ppos)
{ … }

static ssize_t iwl_dbgfs_rfkill_write(struct file *file,
				      const char __user *user_buf,
				      size_t count, loff_t *ppos)
{ … }

static int iwl_dbgfs_monitor_data_open(struct inode *inode,
				       struct file *file)
{ … }

static int iwl_dbgfs_monitor_data_release(struct inode *inode,
					  struct file *file)
{ … }

static bool iwl_write_to_user_buf(char __user *user_buf, ssize_t count,
				  void *buf, ssize_t *size,
				  ssize_t *bytes_copied)
{ … }

static ssize_t iwl_dbgfs_monitor_data_read(struct file *file,
					   char __user *user_buf,
					   size_t count, loff_t *ppos)
{ … }

static ssize_t iwl_dbgfs_rf_read(struct file *file,
				 char __user *user_buf,
				 size_t count, loff_t *ppos)
{ … }

DEBUGFS_READ_WRITE_FILE_OPS(interrupt);
DEBUGFS_READ_FILE_OPS(fh_reg);
DEBUGFS_READ_FILE_OPS(rx_queue);
DEBUGFS_WRITE_FILE_OPS(csr);
DEBUGFS_READ_WRITE_FILE_OPS(rfkill);
DEBUGFS_READ_FILE_OPS(rf);

static const struct file_operations iwl_dbgfs_tx_queue_ops = …;

static const struct file_operations iwl_dbgfs_monitor_data_ops = …;

/* Create the debugfs files and directories */
void iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans)
{ … }

void iwl_trans_pcie_debugfs_cleanup(struct iwl_trans *trans)
{ … }
#endif /*CONFIG_IWLWIFI_DEBUGFS */

static u32 iwl_trans_pcie_get_cmdlen(struct iwl_trans *trans, void *tfd)
{ … }

static u32 iwl_trans_pcie_dump_rbs(struct iwl_trans *trans,
				   struct iwl_fw_error_dump_data **data,
				   int allocated_rb_nums)
{ … }
#define IWL_CSR_TO_DUMP …

static u32 iwl_trans_pcie_dump_csr(struct iwl_trans *trans,
				   struct iwl_fw_error_dump_data **data)
{ … }

static u32 iwl_trans_pcie_fh_regs_dump(struct iwl_trans *trans,
				       struct iwl_fw_error_dump_data **data)
{ … }

static u32
iwl_trans_pci_dump_marbh_monitor(struct iwl_trans *trans,
				 struct iwl_fw_error_dump_fw_mon *fw_mon_data,
				 u32 monitor_len)
{ … }

static void
iwl_trans_pcie_dump_pointers(struct iwl_trans *trans,
			     struct iwl_fw_error_dump_fw_mon *fw_mon_data)
{ … }

static u32
iwl_trans_pcie_dump_monitor(struct iwl_trans *trans,
			    struct iwl_fw_error_dump_data **data,
			    u32 monitor_len)
{ … }

static int iwl_trans_get_fw_monitor_len(struct iwl_trans *trans, u32 *len)
{ … }

struct iwl_trans_dump_data *
iwl_trans_pcie_dump_data(struct iwl_trans *trans, u32 dump_mask,
			 const struct iwl_dump_sanitize_ops *sanitize_ops,
			 void *sanitize_ctx)
{ … }

void iwl_trans_pci_interrupts(struct iwl_trans *trans, bool enable)
{ … }

void iwl_trans_pcie_sync_nmi(struct iwl_trans *trans)
{ … }

struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
			       const struct pci_device_id *ent,
			       const struct iwl_cfg_trans_params *cfg_trans)
{ … }

void iwl_trans_pcie_copy_imr_fh(struct iwl_trans *trans,
				u32 dst_addr, u64 src_addr, u32 byte_cnt)
{ … }

int iwl_trans_pcie_copy_imr(struct iwl_trans *trans,
			    u32 dst_addr, u64 src_addr, u32 byte_cnt)
{ … }