/* * Linux driver for VMware's vmxnet3 ethernet NIC. * * Copyright (C) 2008-2024, VMware, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; version 2 of the License and no later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or * NON INFRINGEMENT. See the GNU General Public License for more * details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. * * The full GNU General Public License is included in this distribution in * the file called "COPYING". * * Maintained by: [email protected] * */ #ifndef _VMXNET3_DEFS_H_ #define _VMXNET3_DEFS_H_ #include "upt1_defs.h" /* all registers are 32 bit wide */ /* BAR 1 */ enum { … }; /* BAR 0 */ enum { … }; /* For Large PT BAR, the following offset to DB register */ enum { … }; #define VMXNET3_PT_REG_SIZE … #define VMXNET3_LARGE_PT_REG_SIZE … #define VMXNET3_VD_REG_SIZE … #define VMXNET3_LARGE_BAR0_REG_SIZE … #define VMXNET3_OOB_REG_SIZE … #define VMXNET3_REG_ALIGN … #define VMXNET3_REG_ALIGN_MASK … /* I/O Mapped access to registers */ #define VMXNET3_IO_TYPE_PT … #define VMXNET3_IO_TYPE_VD … #define VMXNET3_IO_ADDR(type, reg) … #define VMXNET3_IO_TYPE(addr) … #define VMXNET3_IO_REG(addr) … #define VMXNET3_PMC_PSEUDO_TSC … enum { … }; /* * Little Endian layout of bitfields - * Byte 0 : 7.....len.....0 * Byte 1 : oco gen 13.len.8 * Byte 2 : 5.msscof.0 ext1 dtype * Byte 3 : 13...msscof...6 * * Big Endian layout of bitfields - * Byte 0: 13...msscof...6 * Byte 1 : 5.msscof.0 ext1 dtype * Byte 2 : oco gen 13.len.8 * Byte 3 : 7.....len.....0 * * Thus, le32_to_cpu on the dword will allow the big endian driver to read * the bit fields correctly. And cpu_to_le32 will convert bitfields * bit fields written by big endian driver to format required by device. */ struct Vmxnet3_TxDesc { … }; /* TxDesc.OM values */ #define VMXNET3_OM_NONE … #define VMXNET3_OM_ENCAP … #define VMXNET3_OM_CSUM … #define VMXNET3_OM_TSO … /* fields in TxDesc we access w/o using bit fields */ #define VMXNET3_TXD_EOP_SHIFT … #define VMXNET3_TXD_CQ_SHIFT … #define VMXNET3_TXD_GEN_SHIFT … #define VMXNET3_TXD_EOP_DWORD_SHIFT … #define VMXNET3_TXD_GEN_DWORD_SHIFT … #define VMXNET3_TXD_CQ … #define VMXNET3_TXD_EOP … #define VMXNET3_TXD_GEN … #define VMXNET3_HDR_COPY_SIZE … struct Vmxnet3_TxDataDesc { … }; Vmxnet3_RxDataDesc; #define VMXNET3_TCD_GEN_SHIFT … #define VMXNET3_TCD_GEN_SIZE … #define VMXNET3_TCD_TXIDX_SHIFT … #define VMXNET3_TCD_TXIDX_SIZE … #define VMXNET3_TCD_GEN_DWORD_SHIFT … struct Vmxnet3_TxCompDesc { … }; struct Vmxnet3_RxDesc { … }; /* values of RXD.BTYPE */ #define VMXNET3_RXD_BTYPE_HEAD … #define VMXNET3_RXD_BTYPE_BODY … /* fields in RxDesc we access w/o using bit fields */ #define VMXNET3_RXD_BTYPE_SHIFT … #define VMXNET3_RXD_GEN_SHIFT … #define VMXNET3_RCD_HDR_INNER_SHIFT … struct Vmxnet3TSInfo { … }; struct Vmxnet3_TxTSDesc { … }; struct Vmxnet3_RxTSDesc { … }; struct Vmxnet3_RxCompDesc { … }; struct Vmxnet3_RxCompDescExt { … }; /* fields in RxCompDesc we access via Vmxnet3_GenericDesc.dword[3] */ #define VMXNET3_RCD_TUC_SHIFT … #define VMXNET3_RCD_IPC_SHIFT … /* fields in RxCompDesc we access via Vmxnet3_GenericDesc.qword[1] */ #define VMXNET3_RCD_TYPE_SHIFT … #define VMXNET3_RCD_GEN_SHIFT … /* csum OK for TCP/UDP pkts over IP */ #define VMXNET3_RCD_CSUM_OK … #define VMXNET3_TXD_GEN_SIZE … #define VMXNET3_TXD_EOP_SIZE … /* value of RxCompDesc.rssType */ #define VMXNET3_RCD_RSS_TYPE_NONE … #define VMXNET3_RCD_RSS_TYPE_IPV4 … #define VMXNET3_RCD_RSS_TYPE_TCPIPV4 … #define VMXNET3_RCD_RSS_TYPE_IPV6 … #define VMXNET3_RCD_RSS_TYPE_TCPIPV6 … #define VMXNET3_RCD_RSS_TYPE_UDPIPV4 … #define VMXNET3_RCD_RSS_TYPE_UDPIPV6 … #define VMXNET3_RCD_RSS_TYPE_ESPIPV4 … #define VMXNET3_RCD_RSS_TYPE_ESPIPV6 … /* a union for accessing all cmd/completion descriptors */ Vmxnet3_GenericDesc; #define VMXNET3_INIT_GEN … /* Max size of a single tx buffer */ #define VMXNET3_MAX_TX_BUF_SIZE … /* # of tx desc needed for a tx buffer size */ #define VMXNET3_TXD_NEEDED(size) … /* max # of tx descs for a non-tso pkt */ #define VMXNET3_MAX_TXD_PER_PKT … /* max # of tx descs for a tso pkt */ #define VMXNET3_MAX_TSO_TXD_PER_PKT … /* Max size of a single rx buffer */ #define VMXNET3_MAX_RX_BUF_SIZE … /* Minimum size of a type 0 buffer */ #define VMXNET3_MIN_T0_BUF_SIZE … #define VMXNET3_MAX_CSUM_OFFSET … /* Ring base address alignment */ #define VMXNET3_RING_BA_ALIGN … #define VMXNET3_RING_BA_MASK … /* Ring size must be a multiple of 32 */ #define VMXNET3_RING_SIZE_ALIGN … #define VMXNET3_RING_SIZE_MASK … /* Tx Data Ring buffer size must be a multiple of 64 */ #define VMXNET3_TXDATA_DESC_SIZE_ALIGN … #define VMXNET3_TXDATA_DESC_SIZE_MASK … /* Rx Data Ring buffer size must be a multiple of 64 */ #define VMXNET3_RXDATA_DESC_SIZE_ALIGN … #define VMXNET3_RXDATA_DESC_SIZE_MASK … /* Rx TS Ring buffer size must be a multiple of 64 bytes */ #define VMXNET3_RXTS_DESC_SIZE_ALIGN … #define VMXNET3_RXTS_DESC_SIZE_MASK … /* Tx TS Ring buffer size must be a multiple of 64 bytes */ #define VMXNET3_TXTS_DESC_SIZE_ALIGN … #define VMXNET3_TXTS_DESC_SIZE_MASK … /* Max ring size */ #define VMXNET3_TX_RING_MAX_SIZE … #define VMXNET3_TC_RING_MAX_SIZE … #define VMXNET3_RX_RING_MAX_SIZE … #define VMXNET3_RX_RING2_MAX_SIZE … #define VMXNET3_RC_RING_MAX_SIZE … #define VMXNET3_TXDATA_DESC_MIN_SIZE … #define VMXNET3_TXDATA_DESC_MAX_SIZE … #define VMXNET3_RXDATA_DESC_MAX_SIZE … #define VMXNET3_TXTS_DESC_MAX_SIZE … #define VMXNET3_RXTS_DESC_MAX_SIZE … /* a list of reasons for queue stop */ enum { … }; /* completion descriptor types */ #define VMXNET3_CDTYPE_TXCOMP … #define VMXNET3_CDTYPE_RXCOMP … #define VMXNET3_CDTYPE_RXCOMP_LRO … enum { … }; #define VMXNET3_GOS_TYPE_LINUX … struct Vmxnet3_GOSInfo { … }; struct Vmxnet3_DriverInfo { … }; #define VMXNET3_REV1_MAGIC … /* * QueueDescPA must be 128 bytes aligned. It points to an array of * Vmxnet3_TxQueueDesc followed by an array of Vmxnet3_RxQueueDesc. * The number of Vmxnet3_TxQueueDesc/Vmxnet3_RxQueueDesc are specified by * Vmxnet3_MiscConf.numTxQueues/numRxQueues, respectively. */ #define VMXNET3_QUEUE_DESC_ALIGN … struct Vmxnet3_MiscConf { … }; struct Vmxnet3_TxQueueConf { … }; struct Vmxnet3_RxQueueConf { … }; struct Vmxnet3_LatencyConf { … }; struct Vmxnet3_TxQueueTSConf { … }; struct Vmxnet3_RxQueueTSConf { … }; enum vmxnet3_intr_mask_mode { … }; enum vmxnet3_intr_type { … }; #define VMXNET3_MAX_TX_QUEUES … #define VMXNET3_MAX_RX_QUEUES … /* addition 1 for events */ #define VMXNET3_MAX_INTRS … /* Version 6 and later will use below macros */ #define VMXNET3_EXT_MAX_TX_QUEUES … #define VMXNET3_EXT_MAX_RX_QUEUES … /* addition 1 for events */ #define VMXNET3_EXT_MAX_INTRS … #define VMXNET3_FIRST_SET_INTRS … /* value of intrCtrl */ #define VMXNET3_IC_DISABLE_ALL … struct Vmxnet3_IntrConf { … }; struct Vmxnet3_IntrConfExt { … }; /* one bit per VLAN ID, the size is in the units of u32 */ #define VMXNET3_VFT_SIZE … struct Vmxnet3_QueueStatus { … }; struct Vmxnet3_TxQueueCtrl { … }; struct Vmxnet3_RxQueueCtrl { … }; enum { … }; struct Vmxnet3_RxFilterConf { … }; #define VMXNET3_PM_MAX_FILTERS … #define VMXNET3_PM_MAX_PATTERN_SIZE … #define VMXNET3_PM_MAX_MASK_SIZE … #define VMXNET3_PM_WAKEUP_MAGIC … #define VMXNET3_PM_WAKEUP_FILTER … struct Vmxnet3_PM_PktFilter { … }; struct Vmxnet3_PMConf { … }; struct Vmxnet3_VariableLenConfDesc { … }; struct Vmxnet3_TxQueueDesc { … }; struct Vmxnet3_RxQueueDesc { … }; struct Vmxnet3_SetPolling { … }; #define VMXNET3_COAL_STATIC_MAX_DEPTH … #define VMXNET3_COAL_RBC_MIN_RATE … #define VMXNET3_COAL_RBC_MAX_RATE … enum Vmxnet3_CoalesceMode { … }; struct Vmxnet3_CoalesceRbc { … }; struct Vmxnet3_CoalesceStatic { … }; struct Vmxnet3_CoalesceScheme { … }; struct Vmxnet3_MemoryRegion { … }; #define MAX_MEMORY_REGION_PER_QUEUE … #define MAX_MEMORY_REGION_PER_DEVICE … struct Vmxnet3_MemRegs { … }; enum Vmxnet3_RSSField { … }; struct Vmxnet3_RingBufferSize { … }; /* If the command data <= 16 bytes, use the shared memory directly. * otherwise, use variable length configuration descriptor. */ Vmxnet3_CmdInfo; struct Vmxnet3_DSDevRead { … }; struct Vmxnet3_DSDevReadExt { … }; /* All structures in DriverShared are padded to multiples of 8 bytes */ struct Vmxnet3_DriverShared { … }; #define VMXNET3_ECR_RQERR … #define VMXNET3_ECR_TQERR … #define VMXNET3_ECR_LINK … #define VMXNET3_ECR_DIC … #define VMXNET3_ECR_DEBUG … /* flip the gen bit of a ring */ #define VMXNET3_FLIP_RING_GEN(gen) … /* only use this if moving the idx won't affect the gen bit */ #define VMXNET3_INC_RING_IDX_ONLY(idx, ring_size) … #define VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid) … #define VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid) … #define VMXNET3_VFTABLE_ENTRY_IS_SET(vfTable, vid) … #define VMXNET3_MAX_MTU … #define VMXNET3_V6_MAX_MTU … #define VMXNET3_MIN_MTU … #define VMXNET3_LINK_UP … #define VMXNET3_LINK_DOWN … #define VMXNET3_DCR_ERROR … #define VMXNET3_CAP_UDP_RSS … #define VMXNET3_CAP_ESP_RSS_IPV4 … #define VMXNET3_CAP_GENEVE_CHECKSUM_OFFLOAD … #define VMXNET3_CAP_GENEVE_TSO … #define VMXNET3_CAP_VXLAN_CHECKSUM_OFFLOAD … #define VMXNET3_CAP_VXLAN_TSO … #define VMXNET3_CAP_GENEVE_OUTER_CHECKSUM_OFFLOAD … #define VMXNET3_CAP_VXLAN_OUTER_CHECKSUM_OFFLOAD … #define VMXNET3_CAP_PKT_STEERING_IPV4 … #define VMXNET3_CAP_VERSION_4_MAX … #define VMXNET3_CAP_ESP_RSS_IPV6 … #define VMXNET3_CAP_VERSION_5_MAX … #define VMXNET3_CAP_ESP_OVER_UDP_RSS … #define VMXNET3_CAP_INNER_RSS … #define VMXNET3_CAP_INNER_ESP_RSS … #define VMXNET3_CAP_CRC32_HASH_FUNC … #define VMXNET3_CAP_VERSION_6_MAX … #define VMXNET3_CAP_OAM_FILTER … #define VMXNET3_CAP_ESP_QS … #define VMXNET3_CAP_LARGE_BAR … #define VMXNET3_CAP_OOORX_COMP … #define VMXNET3_CAP_VERSION_7_MAX … /* when new capability is introduced, update VMXNET3_CAP_MAX */ #define VMXNET3_CAP_MAX … #define VMXNET3_OFFLOAD_TSO … #define VMXNET3_OFFLOAD_LRO … #endif /* _VMXNET3_DEFS_H_ */
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