linux/drivers/atm/nicstar.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * nicstar.h
 *
 * Header file for the nicstar device driver.
 *
 * Author: Rui Prior ([email protected])
 * PowerPC support by Jay Talbott ([email protected]) April 1999
 *
 * (C) INESC 1998
 */

#ifndef _LINUX_NICSTAR_H_
#define _LINUX_NICSTAR_H_

/* Includes */

#include <linux/types.h>
#include <linux/pci.h>
#include <linux/idr.h>
#include <linux/uio.h>
#include <linux/skbuff.h>
#include <linux/atmdev.h>
#include <linux/atm_nicstar.h>

/* Options */

#define NS_MAX_CARDS

#undef RCQ_SUPPORT		/* Do not define this for now */

#define NS_TST_NUM_ENTRIES
#define NS_TST_RESERVED

#define NS_SMBUFSIZE
#define NS_LGBUFSIZE
#define NS_RSQSIZE
#define NS_VPIBITS

#define NS_MAX_RCTSIZE

				/*#define NS_PCI_LATENCY 64*//* Must be a multiple of 32 */

	/* Number of buffers initially allocated */
#define NUM_SB
#define NUM_LB
#define NUM_HB
#define NUM_IOVB

	/* Lower level for count of buffers */
#define MIN_SB
#define MIN_LB
#define MIN_HB
#define MIN_IOVB

	/* Upper level for count of buffers */
#define MAX_SB
#define MAX_LB
#define MAX_HB
#define MAX_IOVB

	/* These are the absolute maximum allowed for the ioctl() */
#define TOP_SB
#define TOP_LB
#define TOP_HB
#define TOP_IOVB

#define MAX_TBD_PER_VC
#define MAX_TBD_PER_SCQ

#undef ENABLE_TSQFIE

#define SCQFULL_TIMEOUT

#define NS_POLL_PERIOD

#define PCR_TOLERANCE

/* ESI stuff */

#define NICSTAR_EPROM_MAC_ADDR_OFFSET
#define NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT

/* #defines */

#define NS_IOREMAP_SIZE

/*
 * BUF_XX distinguish the Rx buffers depending on their (small/large) size.
 * BUG_SM and BUG_LG are both used by the driver and the device.
 * BUF_NONE is only used by the driver.
 */
#define BUF_SM
#define BUF_LG
#define BUF_NONE

#define NS_HBUFSIZE
#define NS_MAX_IOVECS
#define NS_IOVBUFSIZE

#define NS_SMBUFSIZE_USABLE
#define NS_LGBUFSIZE_USABLE

#define NS_AAL0_HEADER

#define NS_SMSKBSIZE
#define NS_LGSKBSIZE

/* NICStAR structures located in host memory */

/*
 * RSQ - Receive Status Queue
 *
 * Written by the NICStAR, read by the device driver.
 */

ns_rsqe;

#define ns_rsqe_vpi(ns_rsqep)
#define ns_rsqe_vci(ns_rsqep)

#define NS_RSQE_VALID
#define NS_RSQE_NZGFC
#define NS_RSQE_EOPDU
#define NS_RSQE_BUFSIZE
#define NS_RSQE_CONGESTION
#define NS_RSQE_CLP
#define NS_RSQE_CRCERR

#define NS_RSQE_BUFSIZE_SM
#define NS_RSQE_BUFSIZE_LG

#define ns_rsqe_valid(ns_rsqep)
#define ns_rsqe_nzgfc(ns_rsqep)
#define ns_rsqe_eopdu(ns_rsqep)
#define ns_rsqe_bufsize(ns_rsqep)
#define ns_rsqe_congestion(ns_rsqep)
#define ns_rsqe_clp(ns_rsqep)
#define ns_rsqe_crcerr(ns_rsqep)

#define ns_rsqe_cellcount(ns_rsqep)
#define ns_rsqe_init(ns_rsqep)

#define NS_RSQ_NUM_ENTRIES
#define NS_RSQ_ALIGNMENT

/*
 * RCQ - Raw Cell Queue
 *
 * Written by the NICStAR, read by the device driver.
 */

cell_payload;

ns_rcqe;

#define NS_RCQE_SIZE

#define ns_rcqe_islast(ns_rcqep)
#define ns_rcqe_cellheader(ns_rcqep)
#define ns_rcqe_nextbufhandle(ns_rcqep)

/*
 * SCQ - Segmentation Channel Queue
 *
 * Written by the device driver, read by the NICStAR.
 */

ns_scqe;

   /* NOTE: SCQ entries can be either a TBD (Transmit Buffer Descriptors)
      or TSR (Transmit Status Requests) */

#define NS_SCQE_TYPE_TBD
#define NS_SCQE_TYPE_TSR

#define NS_TBD_EOPDU
#define NS_TBD_AAL0
#define NS_TBD_AAL34
#define NS_TBD_AAL5

#define NS_TBD_VPI_MASK
#define NS_TBD_VCI_MASK
#define NS_TBD_VC_MASK

#define NS_TBD_VPI_SHIFT
#define NS_TBD_VCI_SHIFT

#define ns_tbd_mkword_1(flags, m, n, buflen)
#define ns_tbd_mkword_1_novbr(flags, buflen)
#define ns_tbd_mkword_3(control, pdulen)
#define ns_tbd_mkword_4(gfc, vpi, vci, pt, clp)

#define NS_TSR_INTENABLE

#define NS_TSR_SCDISVBR

#define ns_tsr_mkword_1(flags)
#define ns_tsr_mkword_2(scdi, scqi)

#define ns_scqe_is_tsr(ns_scqep)

#define VBR_SCQ_NUM_ENTRIES
#define VBR_SCQSIZE
#define CBR_SCQ_NUM_ENTRIES
#define CBR_SCQSIZE

#define NS_SCQE_SIZE

/*
 * TSQ - Transmit Status Queue
 *
 * Written by the NICStAR, read by the device driver.
 */

ns_tsi;

   /* NOTE: The first word can be a status word copied from the TSR which
      originated the TSI, or a timer overflow indicator. In this last
      case, the value of the first word is all zeroes. */

#define NS_TSI_EMPTY
#define NS_TSI_TIMESTAMP_MASK

#define ns_tsi_isempty(ns_tsip)
#define ns_tsi_gettimestamp(ns_tsip)

#define ns_tsi_init(ns_tsip)

#define NS_TSQSIZE
#define NS_TSQ_NUM_ENTRIES
#define NS_TSQ_ALIGNMENT

#define NS_TSI_SCDISVBR

#define ns_tsi_tmrof(ns_tsip)
#define ns_tsi_getscdindex(ns_tsip)
#define ns_tsi_getscqpos(ns_tsip)

/* NICStAR structures located in local SRAM */

/*
 * RCT - Receive Connection Table
 *
 * Written by both the NICStAR and the device driver.
 */

ns_rcte;

#define NS_RCTE_BSFB
#define NS_RCTE_NZGFC
#define NS_RCTE_CONNECTOPEN
#define NS_RCTE_AALMASK
#define NS_RCTE_AAL0
#define NS_RCTE_AAL34
#define NS_RCTE_AAL5
#define NS_RCTE_RCQ
#define NS_RCTE_RAWCELLINTEN
#define NS_RCTE_RXCONSTCELLADDR
#define NS_RCTE_BUFFVALID
#define NS_RCTE_FBDSIZE
#define NS_RCTE_EFCI
#define NS_RCTE_CLP
#define NS_RCTE_CRCERROR
#define NS_RCTE_CELLCOUNT_MASK

#define NS_RCTE_FBDSIZE_SM
#define NS_RCTE_FBDSIZE_LG

#define NS_RCT_ENTRY_SIZE

   /* NOTE: We could make macros to contruct the first word of the RCTE,
      but that doesn't seem to make much sense... */

/*
 * FBD - Free Buffer Descriptor
 *
 * Written by the device driver using via the command register.
 */

ns_fbd;

/*
 * TST - Transmit Schedule Table
 *
 * Written by the device driver.
 */

ns_tste;

#define NS_TST_OPCODE_MASK

#define NS_TST_OPCODE_NULL
#define NS_TST_OPCODE_FIXED
#define NS_TST_OPCODE_VARIABLE
#define NS_TST_OPCODE_END

#define ns_tste_make(opcode, sramad)

   /* NOTE:

      - When the opcode is FIXED, sramad specifies the SRAM address of the
      SCD for that fixed rate channel.
      - When the opcode is END, sramad specifies the SRAM address of the
      location of the next TST entry to read.
    */

/*
 * SCD - Segmentation Channel Descriptor
 *
 * Written by both the device driver and the NICStAR
 */

ns_scd;

#define NS_SCD_BASE_MASK_VAR
#define NS_SCD_BASE_MASK_FIX
#define NS_SCD_TAIL_MASK_VAR
#define NS_SCD_TAIL_MASK_FIX
#define NS_SCD_HEAD_MASK_VAR
#define NS_SCD_HEAD_MASK_FIX
#define NS_SCD_XMITFOREVER

   /* NOTE: There are other fields in word 2 of the SCD, but as they should
      not be needed in the device driver they are not defined here. */

/* NICStAR local SRAM memory map */

#define NS_RCT
#define NS_RCT_32_END
#define NS_RCT_128_END
#define NS_UNUSED_32
#define NS_UNUSED_128
#define NS_UNUSED_END
#define NS_TST_FRSCD
#define NS_TST_FRSCD_END
#define NS_VRSCD2
#define NS_VRSCD2_END
#define NS_VRSCD1
#define NS_VRSCD1_END
#define NS_VRSCD0
#define NS_VRSCD0_END
#define NS_RXFIFO
#define NS_RXFIFO_END
#define NS_SMFBQ
#define NS_SMFBQ_END
#define NS_LGFBQ
#define NS_LGFBQ_END

/* NISCtAR operation registers */

/* See Section 3.4 of `IDT77211 NICStAR User Manual' from www.idt.com */

enum ns_regs {};

/* NICStAR commands issued to the CMD register */

/* Top 4 bits are command opcode, lower 28 are parameters. */

#define NS_CMD_NO_OPERATION
	/* params always 0 */

#define NS_CMD_OPENCLOSE_CONNECTION
	/* b19{1=open,0=close} b18-2{SRAM addr} */

#define NS_CMD_WRITE_SRAM
	/* b18-2{SRAM addr} b1-0{burst size} */

#define NS_CMD_READ_SRAM
	/* b18-2{SRAM addr} */

#define NS_CMD_WRITE_FREEBUFQ
	/* b0{large buf indicator} */

#define NS_CMD_READ_UTILITY
	/* b8{1=select UTL_CS1} b9{1=select UTL_CS0} b7-0{bus addr} */

#define NS_CMD_WRITE_UTILITY
	/* b8{1=select UTL_CS1} b9{1=select UTL_CS0} b7-0{bus addr} */

#define NS_CMD_OPEN_CONNECTION
#define NS_CMD_CLOSE_CONNECTION

/* NICStAR configuration bits */

#define NS_CFG_SWRST
#define NS_CFG_RXPATH
#define NS_CFG_SMBUFSIZE_MASK
#define NS_CFG_LGBUFSIZE_MASK
#define NS_CFG_EFBIE
#define NS_CFG_RSQSIZE_MASK
#define NS_CFG_ICACCEPT
#define NS_CFG_IGNOREGFC
#define NS_CFG_VPIBITS_MASK
#define NS_CFG_RCTSIZE_MASK
#define NS_CFG_VCERRACCEPT
#define NS_CFG_RXINT_MASK
#define NS_CFG_RAWIE
#define NS_CFG_RSQAFIE
#define NS_CFG_RXRM
#define NS_CFG_TMRROIE
#define NS_CFG_TXEN
#define NS_CFG_TXIE
#define NS_CFG_TXURIE
#define NS_CFG_UMODE
#define NS_CFG_TSQFIE
#define NS_CFG_PHYIE

#define NS_CFG_SMBUFSIZE_48
#define NS_CFG_SMBUFSIZE_96
#define NS_CFG_SMBUFSIZE_240
#define NS_CFG_SMBUFSIZE_2048

#define NS_CFG_LGBUFSIZE_2048
#define NS_CFG_LGBUFSIZE_4096
#define NS_CFG_LGBUFSIZE_8192
#define NS_CFG_LGBUFSIZE_16384

#define NS_CFG_RSQSIZE_2048
#define NS_CFG_RSQSIZE_4096
#define NS_CFG_RSQSIZE_8192

#define NS_CFG_VPIBITS_0
#define NS_CFG_VPIBITS_1
#define NS_CFG_VPIBITS_2
#define NS_CFG_VPIBITS_8

#define NS_CFG_RCTSIZE_4096_ENTRIES
#define NS_CFG_RCTSIZE_8192_ENTRIES
#define NS_CFG_RCTSIZE_16384_ENTRIES

#define NS_CFG_RXINT_NOINT
#define NS_CFG_RXINT_NODELAY
#define NS_CFG_RXINT_314US
#define NS_CFG_RXINT_624US
#define NS_CFG_RXINT_899US

/* NICStAR STATus bits */

#define NS_STAT_SFBQC_MASK
#define NS_STAT_LFBQC_MASK
#define NS_STAT_TSIF
#define NS_STAT_TXICP
#define NS_STAT_TSQF
#define NS_STAT_TMROF
#define NS_STAT_PHYI
#define NS_STAT_CMDBZ
#define NS_STAT_SFBQF
#define NS_STAT_LFBQF
#define NS_STAT_RSQF
#define NS_STAT_EOPDU
#define NS_STAT_RAWCF
#define NS_STAT_SFBQE
#define NS_STAT_LFBQE
#define NS_STAT_RSQAF

#define ns_stat_sfbqc_get(stat)
#define ns_stat_lfbqc_get(stat)

/* #defines which depend on other #defines */

#define NS_TST0
#define NS_TST1

#define NS_FRSCD
#define NS_FRSCD_SIZE
#define NS_FRSCD_NUM

#if (NS_SMBUFSIZE == 48)
#define NS_CFG_SMBUFSIZE
#elif (NS_SMBUFSIZE == 96)
#define NS_CFG_SMBUFSIZE
#elif (NS_SMBUFSIZE == 240)
#define NS_CFG_SMBUFSIZE
#elif (NS_SMBUFSIZE == 2048)
#define NS_CFG_SMBUFSIZE
#else
#error NS_SMBUFSIZE is incorrect in nicstar.h
#endif /* NS_SMBUFSIZE */

#if (NS_LGBUFSIZE == 2048)
#define NS_CFG_LGBUFSIZE
#elif (NS_LGBUFSIZE == 4096)
#define NS_CFG_LGBUFSIZE
#elif (NS_LGBUFSIZE == 8192)
#define NS_CFG_LGBUFSIZE
#elif (NS_LGBUFSIZE == 16384)
#define NS_CFG_LGBUFSIZE
#else
#error NS_LGBUFSIZE is incorrect in nicstar.h
#endif /* NS_LGBUFSIZE */

#if (NS_RSQSIZE == 2048)
#define NS_CFG_RSQSIZE
#elif (NS_RSQSIZE == 4096)
#define NS_CFG_RSQSIZE
#elif (NS_RSQSIZE == 8192)
#define NS_CFG_RSQSIZE
#else
#error NS_RSQSIZE is incorrect in nicstar.h
#endif /* NS_RSQSIZE */

#if (NS_VPIBITS == 0)
#define NS_CFG_VPIBITS
#elif (NS_VPIBITS == 1)
#define NS_CFG_VPIBITS
#elif (NS_VPIBITS == 2)
#define NS_CFG_VPIBITS
#elif (NS_VPIBITS == 8)
#define NS_CFG_VPIBITS
#else
#error NS_VPIBITS is incorrect in nicstar.h
#endif /* NS_VPIBITS */

#ifdef RCQ_SUPPORT
#define NS_CFG_RAWIE_OPT
#else
#define NS_CFG_RAWIE_OPT
#endif /* RCQ_SUPPORT */

#ifdef ENABLE_TSQFIE
#define NS_CFG_TSQFIE_OPT
#else
#define NS_CFG_TSQFIE_OPT
#endif /* ENABLE_TSQFIE */

/* PCI stuff */

#ifndef PCI_VENDOR_ID_IDT
#define PCI_VENDOR_ID_IDT
#endif /* PCI_VENDOR_ID_IDT */

#ifndef PCI_DEVICE_ID_IDT_IDT77201
#define PCI_DEVICE_ID_IDT_IDT77201
#endif /* PCI_DEVICE_ID_IDT_IDT77201 */

/* Device driver structures */

struct ns_skb_prv {};

#define NS_PRV_BUFTYPE(skb)
#define NS_PRV_DMA(skb)
#define NS_PRV_IOVCNT(skb)

tsq_info;

scq_info;

rsq_info;

skb_pool;

/* NOTE: for small and large buffer pools, the count is not used, as the
         actual value used for buffer management is the one read from the
	 card. */

vc_map;

ns_dev;

   /* NOTE: Each tste2vc entry relates a given TST entry to the corresponding
      CBR vc. If the entry is not allocated, it must be NULL.

      There are two TSTs so the driver can modify them on the fly
      without stopping the transmission.

      scd2vc allows us to find out unused fixed rate SCDs, because
      they must have a NULL pointer here. */

#endif /* _LINUX_NICSTAR_H_ */