/* * ti113x.h 1.16 1999/10/25 20:03:34 * * The contents of this file are subject to the Mozilla Public License * Version 1.1 (the "License"); you may not use this file except in * compliance with the License. You may obtain a copy of the License * at http://www.mozilla.org/MPL/ * * Software distributed under the License is distributed on an "AS IS" * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See * the License for the specific language governing rights and * limitations under the License. * * The initial developer of the original code is David A. Hinds * <[email protected]>. Portions created by David A. Hinds * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * Alternatively, the contents of this file may be used under the * terms of the GNU General Public License version 2 (the "GPL"), in which * case the provisions of the GPL are applicable instead of the * above. If you wish to allow the use of your version of this file * only under the terms of the GPL and not to allow others to use * your version of this file under the MPL, indicate your decision by * deleting the provisions above and replace them with the notice and * other provisions required by the GPL. If you do not delete the * provisions above, a recipient may use your version of this file * under either the MPL or the GPL. */ #ifndef _LINUX_TI113X_H #define _LINUX_TI113X_H /* Register definitions for TI 113X PCI-to-CardBus bridges */ /* System Control Register */ #define TI113X_SYSTEM_CONTROL … #define TI113X_SCR_SMIROUTE … #define TI113X_SCR_SMISTATUS … #define TI113X_SCR_SMIENB … #define TI113X_SCR_VCCPROT … #define TI113X_SCR_REDUCEZV … #define TI113X_SCR_CDREQEN … #define TI113X_SCR_CDMACHAN … #define TI113X_SCR_SOCACTIVE … #define TI113X_SCR_PWRSTREAM … #define TI113X_SCR_DELAYUP … #define TI113X_SCR_DELAYDOWN … #define TI113X_SCR_INTERROGATE … #define TI113X_SCR_CLKRUN_SEL … #define TI113X_SCR_PWRSAVINGS … #define TI113X_SCR_SUBSYSRW … #define TI113X_SCR_CB_DPAR … #define TI113X_SCR_CDMA_EN … #define TI113X_SCR_ASYNC_IRQ … #define TI113X_SCR_KEEPCLK … #define TI113X_SCR_CLKRUN_ENA … #define TI122X_SCR_SER_STEP … #define TI122X_SCR_INTRTIE … #define TIXX21_SCR_TIEALL … #define TI122X_SCR_CBRSVD … #define TI122X_SCR_MRBURSTDN … #define TI122X_SCR_MRBURSTUP … #define TI122X_SCR_RIMUX … /* Multimedia Control Register */ #define TI1250_MULTIMEDIA_CTL … #define TI1250_MMC_ZVOUTEN … #define TI1250_MMC_PORTSEL … #define TI1250_MMC_ZVEN1 … #define TI1250_MMC_ZVEN0 … #define TI1250_GENERAL_STATUS … #define TI1250_GPIO0_CONTROL … #define TI1250_GPIO1_CONTROL … #define TI1250_GPIO2_CONTROL … #define TI1250_GPIO3_CONTROL … #define TI1250_GPIO_MODE_MASK … /* IRQMUX/MFUNC Register */ #define TI122X_MFUNC … #define TI122X_MFUNC0_MASK … #define TI122X_MFUNC1_MASK … #define TI122X_MFUNC2_MASK … #define TI122X_MFUNC3_MASK … #define TI122X_MFUNC4_MASK … #define TI122X_MFUNC5_MASK … #define TI122X_MFUNC6_MASK … #define TI122X_MFUNC0_INTA … #define TI125X_MFUNC0_INTB … #define TI122X_MFUNC1_INTB … #define TI122X_MFUNC3_IRQSER … /* Retry Status Register */ #define TI113X_RETRY_STATUS … #define TI113X_RSR_PCIRETRY … #define TI113X_RSR_CBRETRY … #define TI113X_RSR_TEXP_CBB … #define TI113X_RSR_MEXP_CBB … #define TI113X_RSR_TEXP_CBA … #define TI113X_RSR_MEXP_CBA … #define TI113X_RSR_TEXP_PCI … #define TI113X_RSR_MEXP_PCI … /* Card Control Register */ #define TI113X_CARD_CONTROL … #define TI113X_CCR_RIENB … #define TI113X_CCR_ZVENABLE … #define TI113X_CCR_PCI_IRQ_ENA … #define TI113X_CCR_PCI_IREQ … #define TI113X_CCR_PCI_CSC … #define TI113X_CCR_SPKROUTEN … #define TI113X_CCR_IFG … #define TI1220_CCR_PORT_SEL … #define TI122X_CCR_AUD2MUX … /* Device Control Register */ #define TI113X_DEVICE_CONTROL … #define TI113X_DCR_5V_FORCE … #define TI113X_DCR_3V_FORCE … #define TI113X_DCR_IMODE_MASK … #define TI113X_DCR_IMODE_ISA … #define TI113X_DCR_IMODE_SERIAL … #define TI12XX_DCR_IMODE_PCI_ONLY … #define TI12XX_DCR_IMODE_ALL_SERIAL … /* Buffer Control Register */ #define TI113X_BUFFER_CONTROL … #define TI113X_BCR_CB_READ_DEPTH … #define TI113X_BCR_CB_WRITE_DEPTH … #define TI113X_BCR_PCI_READ_DEPTH … #define TI113X_BCR_PCI_WRITE_DEPTH … /* Diagnostic Register */ #define TI1250_DIAGNOSTIC … #define TI1250_DIAG_TRUE_VALUE … #define TI1250_DIAG_PCI_IREQ … #define TI1250_DIAG_PCI_CSC … #define TI1250_DIAG_ASYNC_CSC … /* DMA Registers */ #define TI113X_DMA_0 … #define TI113X_DMA_1 … /* ExCA IO offset registers */ #define TI113X_IO_OFFSET(map) … /* EnE test register */ #define ENE_TEST_C9 … #define ENE_TEST_C9_TLTENABLE … #define ENE_TEST_C9_PFENABLE_F0 … #define ENE_TEST_C9_PFENABLE_F1 … #define ENE_TEST_C9_PFENABLE … #define ENE_TEST_C9_WPDISALBLE_F0 … #define ENE_TEST_C9_WPDISALBLE_F1 … #define ENE_TEST_C9_WPDISALBLE … /* * Texas Instruments CardBus controller overrides. */ #define ti_sysctl(socket) … #define ti_cardctl(socket) … #define ti_devctl(socket) … #define ti_diag(socket) … #define ti_mfunc(socket) … #define ene_test_c9(socket) … /* * These are the TI specific power management handlers. */ static void ti_save_state(struct yenta_socket *socket) { … } static void ti_restore_state(struct yenta_socket *socket) { … } /* * Zoom video control for TI122x/113x chips */ static void ti_zoom_video(struct pcmcia_socket *sock, int onoff) { … } /* * The 145x series can also use this. They have an additional * ZV autodetect mode we don't use but don't actually need. * FIXME: manual says its in func0 and func1 but disagrees with * itself about this - do we need to force func0, if so we need * to know a lot more about socket pairings in pcmcia_socket than * we do now.. uggh. */ static void ti1250_zoom_video(struct pcmcia_socket *sock, int onoff) { … } static void ti_set_zv(struct yenta_socket *socket) { … } /* * Generic TI init - TI has an extension for the * INTCTL register that sets the PCI CSC interrupt. * Make sure we set it correctly at open and init * time * - override: disable the PCI CSC interrupt. This makes * it possible to use the CSC interrupt to probe the * ISA interrupts. * - init: set the interrupt to match our PCI state. * This makes us correctly get PCI CSC interrupt * events. */ static int ti_init(struct yenta_socket *socket) { … } static int ti_override(struct yenta_socket *socket) { … } static void ti113x_use_isa_irq(struct yenta_socket *socket) { … } static int ti113x_override(struct yenta_socket *socket) { … } /* irqrouting for func0, probes PCI interrupt and ISA interrupts */ static void ti12xx_irqroute_func0(struct yenta_socket *socket) { … } /* changes the irq of func1 to match that of func0 */ static int ti12xx_align_irqs(struct yenta_socket *socket, int *old_irq) { … } /* * ties INTA and INTB together. also changes the devices irq to that of * the function 0 device. call from func1 only. * returns 1 if INTRTIE changed, 0 otherwise. */ static int ti12xx_tie_interrupts(struct yenta_socket *socket, int *old_irq) { … } /* undo what ti12xx_tie_interrupts() did */ static void ti12xx_untie_interrupts(struct yenta_socket *socket, int old_irq) { … } /* * irqrouting for func1, plays with INTB routing * only touches MFUNC for INTB routing. all other bits are taken * care of in func0 already. */ static void ti12xx_irqroute_func1(struct yenta_socket *socket) { … } /* Returns true value if the second slot of a two-slot controller is empty */ static int ti12xx_2nd_slot_empty(struct yenta_socket *socket) { … } /* * TI specifiy parts for the power hook. * * some TI's with some CB's produces interrupt storm on power on. it has been * seen with atheros wlan cards on TI1225 and TI1410. solution is simply to * disable any CB interrupts during this time. */ static int ti12xx_power_hook(struct pcmcia_socket *sock, int operation) { … } static int ti12xx_override(struct yenta_socket *socket) { … } static int ti1250_override(struct yenta_socket *socket) { … } /** * EnE specific part. EnE bridges are register compatible with TI bridges but * have their own test registers and more important their own little problems. * Some fixup code to make everybody happy (TM). */ #ifdef CONFIG_YENTA_ENE_TUNE /* * set/clear various test bits: * Defaults to clear the bit. * - mask (u8) defines what bits to change * - bits (u8) is the values to change them to * -> it's * current = (current & ~mask) | bits */ /* pci ids of devices that wants to have the bit set */ #define DEVID(_vend,_dev,_subvend,_subdev,mask,bits) … static struct pci_device_id ene_tune_tbl[] = …; static void ene_tune_bridge(struct pcmcia_socket *sock, struct pci_bus *bus) { … } static int ene_override(struct yenta_socket *socket) { … } #else #define ene_override … #endif /* !CONFIG_YENTA_ENE_TUNE */ #endif /* _LINUX_TI113X_H */
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