// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2010 Google, Inc. * Copyright (C) 2013 NVIDIA Corporation * * Author: * Erik Gilling <[email protected]> * Benoit Goby <[email protected]> * Venu Byravarasu <[email protected]> */ #include <linux/delay.h> #include <linux/err.h> #include <linux/export.h> #include <linux/gpio/consumer.h> #include <linux/iopoll.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_platform.h> #include <linux/platform_device.h> #include <linux/resource.h> #include <linux/slab.h> #include <linux/spinlock.h> #include <linux/regulator/consumer.h> #include <linux/usb/ehci_def.h> #include <linux/usb/of.h> #include <linux/usb/tegra_usb_phy.h> #include <linux/usb/ulpi.h> #define ULPI_VIEWPORT … /* PORTSC PTS/PHCD bits, Tegra20 only */ #define TEGRA_USB_PORTSC1 … #define TEGRA_USB_PORTSC1_PTS(x) … #define TEGRA_USB_PORTSC1_PHCD … /* HOSTPC1 PTS/PHCD bits, Tegra30 and above */ #define TEGRA_USB_HOSTPC1_DEVLC … #define TEGRA_USB_HOSTPC1_DEVLC_PTS(x) … #define TEGRA_USB_HOSTPC1_DEVLC_PHCD … /* Bits of PORTSC1, which will get cleared by writing 1 into them */ #define TEGRA_PORTSC1_RWC_BITS … #define USB_SUSP_CTRL … #define USB_WAKE_ON_RESUME_EN … #define USB_WAKE_ON_CNNT_EN_DEV … #define USB_WAKE_ON_DISCON_EN_DEV … #define USB_SUSP_CLR … #define USB_PHY_CLK_VALID … #define UTMIP_RESET … #define UHSIC_RESET … #define UTMIP_PHY_ENABLE … #define ULPI_PHY_ENABLE … #define USB_SUSP_SET … #define USB_WAKEUP_DEBOUNCE_COUNT(x) … #define USB_PHY_VBUS_SENSORS … #define B_SESS_VLD_WAKEUP_EN … #define A_SESS_VLD_WAKEUP_EN … #define A_VBUS_VLD_WAKEUP_EN … #define USB_PHY_VBUS_WAKEUP_ID … #define ID_INT_EN … #define ID_CHG_DET … #define VBUS_WAKEUP_INT_EN … #define VBUS_WAKEUP_CHG_DET … #define VBUS_WAKEUP_STS … #define VBUS_WAKEUP_WAKEUP_EN … #define USB1_LEGACY_CTRL … #define USB1_NO_LEGACY_MODE … #define USB1_VBUS_SENSE_CTL_MASK … #define USB1_VBUS_SENSE_CTL_VBUS_WAKEUP … #define USB1_VBUS_SENSE_CTL_AB_SESS_VLD_OR_VBUS_WAKEUP … #define USB1_VBUS_SENSE_CTL_AB_SESS_VLD … #define USB1_VBUS_SENSE_CTL_A_SESS_VLD … #define ULPI_TIMING_CTRL_0 … #define ULPI_OUTPUT_PINMUX_BYP … #define ULPI_CLKOUT_PINMUX_BYP … #define ULPI_TIMING_CTRL_1 … #define ULPI_DATA_TRIMMER_LOAD … #define ULPI_DATA_TRIMMER_SEL(x) … #define ULPI_STPDIRNXT_TRIMMER_LOAD … #define ULPI_STPDIRNXT_TRIMMER_SEL(x) … #define ULPI_DIR_TRIMMER_LOAD … #define ULPI_DIR_TRIMMER_SEL(x) … #define UTMIP_PLL_CFG1 … #define UTMIP_XTAL_FREQ_COUNT(x) … #define UTMIP_PLLU_ENABLE_DLY_COUNT(x) … #define UTMIP_XCVR_CFG0 … #define UTMIP_XCVR_SETUP(x) … #define UTMIP_XCVR_SETUP_MSB(x) … #define UTMIP_XCVR_LSRSLEW(x) … #define UTMIP_XCVR_LSFSLEW(x) … #define UTMIP_FORCE_PD_POWERDOWN … #define UTMIP_FORCE_PD2_POWERDOWN … #define UTMIP_FORCE_PDZI_POWERDOWN … #define UTMIP_XCVR_LSBIAS_SEL … #define UTMIP_XCVR_HSSLEW(x) … #define UTMIP_XCVR_HSSLEW_MSB(x) … #define UTMIP_BIAS_CFG0 … #define UTMIP_OTGPD … #define UTMIP_BIASPD … #define UTMIP_HSSQUELCH_LEVEL(x) … #define UTMIP_HSDISCON_LEVEL(x) … #define UTMIP_HSDISCON_LEVEL_MSB(x) … #define UTMIP_HSRX_CFG0 … #define UTMIP_ELASTIC_LIMIT(x) … #define UTMIP_IDLE_WAIT(x) … #define UTMIP_HSRX_CFG1 … #define UTMIP_HS_SYNC_START_DLY(x) … #define UTMIP_TX_CFG0 … #define UTMIP_FS_PREABMLE_J … #define UTMIP_HS_DISCON_DISABLE … #define UTMIP_MISC_CFG0 … #define UTMIP_DPDM_OBSERVE … #define UTMIP_DPDM_OBSERVE_SEL(x) … #define UTMIP_DPDM_OBSERVE_SEL_FS_J … #define UTMIP_DPDM_OBSERVE_SEL_FS_K … #define UTMIP_DPDM_OBSERVE_SEL_FS_SE1 … #define UTMIP_DPDM_OBSERVE_SEL_FS_SE0 … #define UTMIP_SUSPEND_EXIT_ON_EDGE … #define UTMIP_MISC_CFG1 … #define UTMIP_PLL_ACTIVE_DLY_COUNT(x) … #define UTMIP_PLLU_STABLE_COUNT(x) … #define UTMIP_DEBOUNCE_CFG0 … #define UTMIP_BIAS_DEBOUNCE_A(x) … #define UTMIP_BAT_CHRG_CFG0 … #define UTMIP_PD_CHRG … #define UTMIP_SPARE_CFG0 … #define FUSE_SETUP_SEL … #define UTMIP_XCVR_CFG1 … #define UTMIP_FORCE_PDDISC_POWERDOWN … #define UTMIP_FORCE_PDCHRP_POWERDOWN … #define UTMIP_FORCE_PDDR_POWERDOWN … #define UTMIP_XCVR_TERM_RANGE_ADJ(x) … #define UTMIP_BIAS_CFG1 … #define UTMIP_BIAS_PDTRK_COUNT(x) … /* For Tegra30 and above only, the address is different in Tegra20 */ #define USB_USBMODE … #define USB_USBMODE_MASK … #define USB_USBMODE_HOST … #define USB_USBMODE_DEVICE … #define PMC_USB_AO … #define VBUS_WAKEUP_PD_P0 … #define ID_PD_P0 … static DEFINE_SPINLOCK(utmip_pad_lock); static unsigned int utmip_pad_count; struct tegra_xtal_freq { … }; static const struct tegra_xtal_freq tegra_freq_table[] = …; static inline struct tegra_usb_phy *to_tegra_usb_phy(struct usb_phy *u_phy) { … } static void set_pts(struct tegra_usb_phy *phy, u8 pts_val) { … } static void set_phcd(struct tegra_usb_phy *phy, bool enable) { … } static int utmip_pad_open(struct tegra_usb_phy *phy) { … } static int utmip_pad_close(struct tegra_usb_phy *phy) { … } static int utmip_pad_power_on(struct tegra_usb_phy *phy) { … } static int utmip_pad_power_off(struct tegra_usb_phy *phy) { … } static int utmi_wait_register(void __iomem *reg, u32 mask, u32 result) { … } static void utmi_phy_clk_disable(struct tegra_usb_phy *phy) { … } static void utmi_phy_clk_enable(struct tegra_usb_phy *phy) { … } static int utmi_phy_power_on(struct tegra_usb_phy *phy) { … } static int utmi_phy_power_off(struct tegra_usb_phy *phy) { … } static void utmi_phy_preresume(struct tegra_usb_phy *phy) { … } static void utmi_phy_postresume(struct tegra_usb_phy *phy) { … } static void utmi_phy_restore_start(struct tegra_usb_phy *phy, enum tegra_usb_phy_port_speed port_speed) { … } static void utmi_phy_restore_end(struct tegra_usb_phy *phy) { … } static int ulpi_phy_power_on(struct tegra_usb_phy *phy) { … } static int ulpi_phy_power_off(struct tegra_usb_phy *phy) { … } static int tegra_usb_phy_power_on(struct tegra_usb_phy *phy) { … } static int tegra_usb_phy_power_off(struct tegra_usb_phy *phy) { … } static void tegra_usb_phy_shutdown(struct usb_phy *u_phy) { … } static irqreturn_t tegra_usb_phy_isr(int irq, void *data) { … } static int tegra_usb_phy_set_wakeup(struct usb_phy *u_phy, bool enable) { … } static int tegra_usb_phy_set_suspend(struct usb_phy *u_phy, int suspend) { … } static int tegra_usb_phy_configure_pmc(struct tegra_usb_phy *phy) { … } static int tegra_usb_phy_init(struct usb_phy *u_phy) { … } void tegra_usb_phy_preresume(struct usb_phy *u_phy) { … } EXPORT_SYMBOL_GPL(…); void tegra_usb_phy_postresume(struct usb_phy *u_phy) { … } EXPORT_SYMBOL_GPL(…); void tegra_ehci_phy_restore_start(struct usb_phy *u_phy, enum tegra_usb_phy_port_speed port_speed) { … } EXPORT_SYMBOL_GPL(…); void tegra_ehci_phy_restore_end(struct usb_phy *u_phy) { … } EXPORT_SYMBOL_GPL(…); static int read_utmi_param(struct platform_device *pdev, const char *param, u8 *dest) { … } static int utmi_phy_probe(struct tegra_usb_phy *tegra_phy, struct platform_device *pdev) { … } static void tegra_usb_phy_put_pmc_device(void *dev) { … } static int tegra_usb_phy_parse_pmc(struct device *dev, struct tegra_usb_phy *phy) { … } static const struct tegra_phy_soc_config tegra20_soc_config = …; static const struct tegra_phy_soc_config tegra30_soc_config = …; static const struct of_device_id tegra_usb_phy_id_table[] = …; MODULE_DEVICE_TABLE(of, tegra_usb_phy_id_table); static int tegra_usb_phy_probe(struct platform_device *pdev) { … } static void tegra_usb_phy_remove(struct platform_device *pdev) { … } static struct platform_driver tegra_usb_phy_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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