// SPDX-License-Identifier: GPL-2.0 /* * core.c - DesignWare USB3 DRD Controller Core file * * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <[email protected]>, * Sebastian Andrzej Siewior <[email protected]> */ #include <linux/clk.h> #include <linux/version.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/slab.h> #include <linux/spinlock.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/io.h> #include <linux/list.h> #include <linux/delay.h> #include <linux/dma-mapping.h> #include <linux/of.h> #include <linux/of_graph.h> #include <linux/acpi.h> #include <linux/pinctrl/consumer.h> #include <linux/reset.h> #include <linux/bitfield.h> #include <linux/usb/ch9.h> #include <linux/usb/gadget.h> #include <linux/usb/of.h> #include <linux/usb/otg.h> #include "core.h" #include "gadget.h" #include "io.h" #include "debug.h" #include "../host/xhci-ext-caps.h" #define DWC3_DEFAULT_AUTOSUSPEND_DELAY … /** * dwc3_get_dr_mode - Validates and sets dr_mode * @dwc: pointer to our context structure */ static int dwc3_get_dr_mode(struct dwc3 *dwc) { … } void dwc3_enable_susphy(struct dwc3 *dwc, bool enable) { … } void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode) { … } static void __dwc3_set_mode(struct work_struct *work) { … } void dwc3_set_mode(struct dwc3 *dwc, u32 mode) { … } u32 dwc3_core_fifo_space(struct dwc3_ep *dep, u8 type) { … } /** * dwc3_core_soft_reset - Issues core soft reset and PHY reset * @dwc: pointer to our context structure */ int dwc3_core_soft_reset(struct dwc3 *dwc) { … } /* * dwc3_frame_length_adjustment - Adjusts frame length if required * @dwc3: Pointer to our controller context structure */ static void dwc3_frame_length_adjustment(struct dwc3 *dwc) { … } /** * dwc3_ref_clk_period - Reference clock period configuration * Default reference clock period depends on hardware * configuration. For systems with reference clock that differs * from the default, this will set clock period in DWC3_GUCTL * register. * @dwc: Pointer to our controller context structure */ static void dwc3_ref_clk_period(struct dwc3 *dwc) { … } /** * dwc3_free_one_event_buffer - Frees one event buffer * @dwc: Pointer to our controller context structure * @evt: Pointer to event buffer to be freed */ static void dwc3_free_one_event_buffer(struct dwc3 *dwc, struct dwc3_event_buffer *evt) { … } /** * dwc3_alloc_one_event_buffer - Allocates one event buffer structure * @dwc: Pointer to our controller context structure * @length: size of the event buffer * * Returns a pointer to the allocated event buffer structure on success * otherwise ERR_PTR(errno). */ static struct dwc3_event_buffer *dwc3_alloc_one_event_buffer(struct dwc3 *dwc, unsigned int length) { … } /** * dwc3_free_event_buffers - frees all allocated event buffers * @dwc: Pointer to our controller context structure */ static void dwc3_free_event_buffers(struct dwc3 *dwc) { … } /** * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length * @dwc: pointer to our controller context structure * @length: size of event buffer * * Returns 0 on success otherwise negative errno. In the error case, dwc * may contain some buffers allocated but not all which were requested. */ static int dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned int length) { … } /** * dwc3_event_buffers_setup - setup our allocated event buffers * @dwc: pointer to our controller context structure * * Returns 0 on success otherwise negative errno. */ int dwc3_event_buffers_setup(struct dwc3 *dwc) { … } void dwc3_event_buffers_cleanup(struct dwc3 *dwc) { … } static void dwc3_core_num_eps(struct dwc3 *dwc) { … } static void dwc3_cache_hwparams(struct dwc3 *dwc) { … } static void dwc3_config_soc_bus(struct dwc3 *dwc) { … } static int dwc3_core_ulpi_init(struct dwc3 *dwc) { … } static int dwc3_ss_phy_setup(struct dwc3 *dwc, int index) { … } static int dwc3_hs_phy_setup(struct dwc3 *dwc, int index) { … } /** * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core * @dwc: Pointer to our controller context structure * * Returns 0 on success. The USB PHY interfaces are configured but not * initialized. The PHY interfaces and the PHYs get initialized together with * the core in dwc3_core_init. */ static int dwc3_phy_setup(struct dwc3 *dwc) { … } static int dwc3_phy_init(struct dwc3 *dwc) { … } static void dwc3_phy_exit(struct dwc3 *dwc) { … } static int dwc3_phy_power_on(struct dwc3 *dwc) { … } static void dwc3_phy_power_off(struct dwc3 *dwc) { … } static int dwc3_clk_enable(struct dwc3 *dwc) { … } static void dwc3_clk_disable(struct dwc3 *dwc) { … } static void dwc3_core_exit(struct dwc3 *dwc) { … } static bool dwc3_core_is_valid(struct dwc3 *dwc) { … } static void dwc3_core_setup_global_control(struct dwc3 *dwc) { … } static int dwc3_core_get_phy(struct dwc3 *dwc); static int dwc3_core_ulpi_init(struct dwc3 *dwc); /* set global incr burst type configuration registers */ static void dwc3_set_incr_burst_type(struct dwc3 *dwc) { … } static void dwc3_set_power_down_clk_scale(struct dwc3 *dwc) { … } static void dwc3_config_threshold(struct dwc3 *dwc) { … } /** * dwc3_core_init - Low-level initialization of DWC3 Core * @dwc: Pointer to our controller context structure * * Returns 0 on success otherwise negative errno. */ static int dwc3_core_init(struct dwc3 *dwc) { … } static int dwc3_core_get_phy(struct dwc3 *dwc) { … } static int dwc3_core_init_mode(struct dwc3 *dwc) { … } static void dwc3_core_exit_mode(struct dwc3 *dwc) { … } static void dwc3_get_software_properties(struct dwc3 *dwc) { … } static void dwc3_get_properties(struct dwc3 *dwc) { … } /* check whether the core supports IMOD */ bool dwc3_has_imod(struct dwc3 *dwc) { … } static void dwc3_check_params(struct dwc3 *dwc) { … } static struct extcon_dev *dwc3_get_extcon(struct dwc3 *dwc) { … } static int dwc3_get_clocks(struct dwc3 *dwc) { … } static int dwc3_get_num_ports(struct dwc3 *dwc) { … } static int dwc3_probe(struct platform_device *pdev) { … } static void dwc3_remove(struct platform_device *pdev) { … } #ifdef CONFIG_PM static int dwc3_core_init_for_resume(struct dwc3 *dwc) { … } static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg) { … } static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg) { … } static int dwc3_runtime_checks(struct dwc3 *dwc) { … } static int dwc3_runtime_suspend(struct device *dev) { … } static int dwc3_runtime_resume(struct device *dev) { … } static int dwc3_runtime_idle(struct device *dev) { … } #endif /* CONFIG_PM */ #ifdef CONFIG_PM_SLEEP static int dwc3_suspend(struct device *dev) { … } static int dwc3_resume(struct device *dev) { … } static void dwc3_complete(struct device *dev) { … } #else #define dwc3_complete … #endif /* CONFIG_PM_SLEEP */ static const struct dev_pm_ops dwc3_dev_pm_ops = …; #ifdef CONFIG_OF static const struct of_device_id of_dwc3_match[] = …; MODULE_DEVICE_TABLE(of, of_dwc3_match); #endif #ifdef CONFIG_ACPI #define ACPI_ID_INTEL_BSW … static const struct acpi_device_id dwc3_acpi_match[] = …; MODULE_DEVICE_TABLE(acpi, dwc3_acpi_match); #endif static struct platform_driver dwc3_driver = …; module_platform_driver(…) …; MODULE_ALIAS(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …; MODULE_DESCRIPTION(…) …;
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