// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* * core_intr.c - DesignWare HS OTG Controller common interrupt handling * * Copyright (C) 2004-2013 Synopsys, Inc. */ /* * This file contains the common interrupt handlers */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/spinlock.h> #include <linux/interrupt.h> #include <linux/dma-mapping.h> #include <linux/io.h> #include <linux/slab.h> #include <linux/usb.h> #include <linux/usb/hcd.h> #include <linux/usb/ch11.h> #include "core.h" #include "hcd.h" static const char *dwc2_op_state_str(struct dwc2_hsotg *hsotg) { … } /** * dwc2_handle_usb_port_intr - handles OTG PRTINT interrupts. * When the PRTINT interrupt fires, there are certain status bits in the Host * Port that needs to get cleared. * * @hsotg: Programming view of DWC_otg controller */ static void dwc2_handle_usb_port_intr(struct dwc2_hsotg *hsotg) { … } /** * dwc2_handle_mode_mismatch_intr() - Logs a mode mismatch warning message * * @hsotg: Programming view of DWC_otg controller */ static void dwc2_handle_mode_mismatch_intr(struct dwc2_hsotg *hsotg) { … } /** * dwc2_handle_otg_intr() - Handles the OTG Interrupts. It reads the OTG * Interrupt Register (GOTGINT) to determine what interrupt has occurred. * * @hsotg: Programming view of DWC_otg controller */ static void dwc2_handle_otg_intr(struct dwc2_hsotg *hsotg) { … } /** * dwc2_handle_conn_id_status_change_intr() - Handles the Connector ID Status * Change Interrupt * * @hsotg: Programming view of DWC_otg controller * * Reads the OTG Interrupt Register (GOTCTL) to determine whether this is a * Device to Host Mode transition or a Host to Device Mode transition. This only * occurs when the cable is connected/removed from the PHY connector. */ static void dwc2_handle_conn_id_status_change_intr(struct dwc2_hsotg *hsotg) { … } /** * dwc2_handle_session_req_intr() - This interrupt indicates that a device is * initiating the Session Request Protocol to request the host to turn on bus * power so a new session can begin * * @hsotg: Programming view of DWC_otg controller * * This handler responds by turning on bus power. If the DWC_otg controller is * in low power mode, this handler brings the controller out of low power mode * before turning on bus power. */ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg) { … } /** * dwc2_wakeup_from_lpm_l1 - Exit the device from LPM L1 state * * @hsotg: Programming view of DWC_otg controller * */ void dwc2_wakeup_from_lpm_l1(struct dwc2_hsotg *hsotg, bool remotewakeup) { … } /* * This interrupt indicates that the DWC_otg controller has detected a * resume or remote wakeup sequence. If the DWC_otg controller is in * low power mode, the handler must brings the controller out of low * power mode. The controller automatically begins resume signaling. * The handler schedules a time to stop resume signaling. */ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) { … } /* * This interrupt indicates that a device has been disconnected from the * root port */ static void dwc2_handle_disconnect_intr(struct dwc2_hsotg *hsotg) { … } /* * This interrupt indicates that SUSPEND state has been detected on the USB. * * For HNP the USB Suspend interrupt signals the change from "a_peripheral" * to "a_host". * * When power management is enabled the core will be put in low power mode. */ static void dwc2_handle_usb_suspend_intr(struct dwc2_hsotg *hsotg) { … } /** * dwc2_handle_lpm_intr - GINTSTS_LPMTRANRCVD Interrupt handler * * @hsotg: Programming view of DWC_otg controller * */ static void dwc2_handle_lpm_intr(struct dwc2_hsotg *hsotg) { … } #define GINTMSK_COMMON … /* * This function returns the Core Interrupt register */ static u32 dwc2_read_common_intr(struct dwc2_hsotg *hsotg) { … } /** * dwc_handle_gpwrdn_disc_det() - Handles the gpwrdn disconnect detect. * Exits hibernation without restoring registers. * * @hsotg: Programming view of DWC_otg controller * @gpwrdn: GPWRDN register */ static inline void dwc_handle_gpwrdn_disc_det(struct dwc2_hsotg *hsotg, u32 gpwrdn) { … } /* * GPWRDN interrupt handler. * * The GPWRDN interrupts are those that occur in both Host and * Device mode while core is in hibernated state. */ static int dwc2_handle_gpwrdn_intr(struct dwc2_hsotg *hsotg) { … } /* * Common interrupt handler * * The common interrupts are those that occur in both Host and Device mode. * This handler handles the following interrupts: * - Mode Mismatch Interrupt * - OTG Interrupt * - Connector ID Status Change Interrupt * - Disconnect Interrupt * - Session Request Interrupt * - Resume / Remote Wakeup Detected Interrupt * - Suspend Interrupt */ irqreturn_t dwc2_handle_common_intr(int irq, void *dev) { … }