// SPDX-License-Identifier: GPL-2.0 /* * cdns3-imx.c - NXP i.MX specific Glue layer for Cadence USB Controller * * Copyright (C) 2019 NXP */ #include <linux/bits.h> #include <linux/clk.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/dma-mapping.h> #include <linux/io.h> #include <linux/of_platform.h> #include <linux/iopoll.h> #include <linux/pm_runtime.h> #include "core.h" #define USB3_CORE_CTRL1 … #define USB3_CORE_CTRL2 … #define USB3_INT_REG … #define USB3_CORE_STATUS … #define XHCI_DEBUG_LINK_ST … #define XHCI_DEBUG_BUS … #define USB3_SSPHY_CTRL1 … #define USB3_SSPHY_CTRL2 … #define USB3_SSPHY_STATUS … #define USB2_PHY_CTRL1 … #define USB2_PHY_CTRL2 … #define USB2_PHY_STATUS … /* Register bits definition */ /* USB3_CORE_CTRL1 */ #define SW_RESET_MASK … #define PWR_SW_RESET … #define APB_SW_RESET … #define AXI_SW_RESET … #define RW_SW_RESET … #define PHY_SW_RESET … #define PHYAHB_SW_RESET … #define ALL_SW_RESET … #define OC_DISABLE … #define MDCTRL_CLK_SEL … #define MODE_STRAP_MASK … #define DEV_MODE … #define HOST_MODE … #define OTG_MODE … /* USB3_INT_REG */ #define CLK_125_REQ … #define LPM_CLK_REQ … #define DEVU3_WAEKUP_EN … #define OTG_WAKEUP_EN … #define DEV_INT_EN … #define HOST_INT1_EN … /* USB3_CORE_STATUS */ #define MDCTRL_CLK_STATUS … #define DEV_POWER_ON_READY … #define HOST_POWER_ON_READY … /* USB3_SSPHY_STATUS */ #define CLK_VALID_MASK … #define CLK_VALID_COMPARE_BITS … #define PHY_REFCLK_REQ … /* OTG registers definition */ #define OTGSTS … /* OTGSTS */ #define OTG_NRDY … /* xHCI registers definition */ #define XECP_PM_PMCSR … #define XECP_AUX_CTRL_REG1 … /* Register bits definition */ /* XECP_AUX_CTRL_REG1 */ #define CFG_RXDET_P3_EN … /* XECP_PM_PMCSR */ #define PS_MASK … #define PS_D0 … #define PS_D1 … struct cdns_imx { … }; static inline u32 cdns_imx_readl(struct cdns_imx *data, u32 offset) { … } static inline void cdns_imx_writel(struct cdns_imx *data, u32 offset, u32 value) { … } static const struct clk_bulk_data imx_cdns3_core_clks[] = …; static int cdns_imx_noncore_init(struct cdns_imx *data) { … } static int cdns_imx_platform_suspend(struct device *dev, bool suspend, bool wakeup); static struct cdns3_platform_data cdns_imx_pdata = …; static const struct of_dev_auxdata cdns_imx_auxdata[] = …; static int cdns_imx_probe(struct platform_device *pdev) { … } static void cdns_imx_remove(struct platform_device *pdev) { … } #ifdef CONFIG_PM static void cdns3_set_wakeup(struct cdns_imx *data, bool enable) { … } static int cdns_imx_platform_suspend(struct device *dev, bool suspend, bool wakeup) { … } static int cdns_imx_resume(struct device *dev) { … } static int cdns_imx_suspend(struct device *dev) { … } /* Indicate if the controller was power lost before */ static inline bool cdns_imx_is_power_lost(struct cdns_imx *data) { … } static int __maybe_unused cdns_imx_system_suspend(struct device *dev) { … } static int __maybe_unused cdns_imx_system_resume(struct device *dev) { … } #else static int cdns_imx_platform_suspend(struct device *dev, bool suspend, bool wakeup) { return 0; } #endif /* CONFIG_PM */ static const struct dev_pm_ops cdns_imx_pm_ops = …; static const struct of_device_id cdns_imx_of_match[] = …; MODULE_DEVICE_TABLE(of, cdns_imx_of_match); static struct platform_driver cdns_imx_driver = …; module_platform_driver(…) …; MODULE_ALIAS(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …; MODULE_DESCRIPTION(…) …;
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