/* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_FOTG210_H #define __LINUX_FOTG210_H #include <linux/usb/ehci-dbgp.h> /* definitions used for the EHCI driver */ /* * __hc32 and __hc16 are "Host Controller" types, they may be equivalent to * __leXX (normally) or __beXX (given FOTG210_BIG_ENDIAN_DESC), depending on * the host controller implementation. * * To facilitate the strongest possible byte-order checking from "sparse" * and so on, we use __leXX unless that's not practical. */ #define __hc32 … #define __hc16 … /* statistics can be kept for tuning/monitoring */ struct fotg210_stats { … }; /* fotg210_hcd->lock guards shared data against other CPUs: * fotg210_hcd: async, unlink, periodic (and shadow), ... * usb_host_endpoint: hcpriv * fotg210_qh: qh_next, qtd_list * fotg210_qtd: qtd_list * * Also, hold this lock when talking to HC registers or * when updating hw_* fields in shared qh/qtd/... structures. */ #define FOTG210_MAX_ROOT_PORTS … /* * fotg210_rh_state values of FOTG210_RH_RUNNING or above mean that the * controller may be doing DMA. Lower values mean there's no DMA. */ enum fotg210_rh_state { … }; /* * Timer events, ordered by increasing delay length. * Always update event_delays_ns[] and event_handlers[] (defined in * ehci-timer.c) in parallel with this list. */ enum fotg210_hrtimer_event { … }; #define FOTG210_HRTIMER_NO_EVENT … struct fotg210_hcd { … }; /* convert between an HCD pointer and the corresponding FOTG210_HCD */ static inline struct fotg210_hcd *hcd_to_fotg210(struct usb_hcd *hcd) { … } static inline struct usb_hcd *fotg210_to_hcd(struct fotg210_hcd *fotg210) { … } /*-------------------------------------------------------------------------*/ /* EHCI register interface, corresponds to EHCI Revision 0.95 specification */ /* Section 2.2 Host Controller Capability Registers */ struct fotg210_caps { … }; /* Section 2.3 Host Controller Operational Registers */ struct fotg210_regs { … }; /*-------------------------------------------------------------------------*/ #define QTD_NEXT(fotg210, dma) … /* * EHCI Specification 0.95 Section 3.5 * QTD: describe data transfer components (buffer, direction, ...) * See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram". * * These are associated only with "QH" (Queue Head) structures, * used with control, bulk, and interrupt transfers. */ struct fotg210_qtd { … } __aligned(…); /* mask NakCnt+T in qh->hw_alt_next */ #define QTD_MASK(fotg210) … #define IS_SHORT_READ(token) … /*-------------------------------------------------------------------------*/ /* type tag from {qh,itd,fstn}->hw_next */ #define Q_NEXT_TYPE(fotg210, dma) … /* * Now the following defines are not converted using the * cpu_to_le32() macro anymore, since we have to support * "dynamic" switching between be and le support, so that the driver * can be used on one system with SoC EHCI controller using big-endian * descriptors as well as a normal little-endian PCI EHCI controller. */ /* values for that type tag */ #define Q_TYPE_ITD … #define Q_TYPE_QH … #define Q_TYPE_SITD … #define Q_TYPE_FSTN … /* next async queue entry, or pointer to interrupt/periodic QH */ #define QH_NEXT(fotg210, dma) … /* for periodic/async schedules and qtd lists, mark end of list */ #define FOTG210_LIST_END(fotg210) … /* * Entries in periodic shadow table are pointers to one of four kinds * of data structure. That's dictated by the hardware; a type tag is * encoded in the low bits of the hardware's periodic schedule. Use * Q_NEXT_TYPE to get the tag. * * For entries in the async schedule, the type tag always says "qh". */ fotg210_shadow; /*-------------------------------------------------------------------------*/ /* * EHCI Specification 0.95 Section 3.6 * QH: describes control/bulk/interrupt endpoints * See Fig 3-7 "Queue Head Structure Layout". * * These appear in both the async and (for interrupt) periodic schedules. */ /* first part defined by EHCI spec */ struct fotg210_qh_hw { … } __aligned(…); struct fotg210_qh { … }; /*-------------------------------------------------------------------------*/ /* description of one iso transaction (up to 3 KB data if highspeed) */ struct fotg210_iso_packet { … }; /* temporary schedule data for packets from iso urbs (both speeds) * each packet is one logical usb transaction to the device (not TT), * beginning at stream->next_uframe */ struct fotg210_iso_sched { … }; /* * fotg210_iso_stream - groups all (s)itds for this endpoint. * acts like a qh would, if EHCI had them for ISO. */ struct fotg210_iso_stream { … }; /*-------------------------------------------------------------------------*/ /* * EHCI Specification 0.95 Section 3.3 * Fig 3-4 "Isochronous Transaction Descriptor (iTD)" * * Schedule records for high speed iso xfers */ struct fotg210_itd { … } __aligned(…); /*-------------------------------------------------------------------------*/ /* * EHCI Specification 0.96 Section 3.7 * Periodic Frame Span Traversal Node (FSTN) * * Manages split interrupt transactions (using TT) that span frame boundaries * into uframes 0/1; see 4.12.2.2. In those uframes, a "save place" FSTN * makes the HC jump (back) to a QH to scan for fs/ls QH completions until * it hits a "restore" FSTN; then it returns to finish other uframe 0/1 work. */ struct fotg210_fstn { … } __aligned(…); /*-------------------------------------------------------------------------*/ /* Prepare the PORTSC wakeup flags during controller suspend/resume */ #define fotg210_prepare_ports_for_controller_suspend(fotg210, do_wakeup) … #define fotg210_prepare_ports_for_controller_resume(fotg210) … /*-------------------------------------------------------------------------*/ /* * Some EHCI controllers have a Transaction Translator built into the * root hub. This is a non-standard feature. Each controller will need * to add code to the following inline functions, and call them as * needed (mostly in root hub code). */ static inline unsigned int fotg210_get_speed(struct fotg210_hcd *fotg210, unsigned int portsc) { … } /* Returns the speed of a device attached to a port on the root hub. */ static inline unsigned int fotg210_port_speed(struct fotg210_hcd *fotg210, unsigned int portsc) { … } /*-------------------------------------------------------------------------*/ #define fotg210_has_fsl_portno_bug(e) … /* * While most USB host controllers implement their registers in * little-endian format, a minority (celleb companion chip) implement * them in big endian format. * * This attempts to support either format at compile time without a * runtime penalty, or both formats with the additional overhead * of checking a flag bit. * */ #define fotg210_big_endian_mmio(e) … #define fotg210_big_endian_capbase(e) … static inline unsigned int fotg210_readl(const struct fotg210_hcd *fotg210, __u32 __iomem *regs) { … } static inline void fotg210_writel(const struct fotg210_hcd *fotg210, const unsigned int val, __u32 __iomem *regs) { … } /* cpu to fotg210 */ static inline __hc32 cpu_to_hc32(const struct fotg210_hcd *fotg210, const u32 x) { … } /* fotg210 to cpu */ static inline u32 hc32_to_cpu(const struct fotg210_hcd *fotg210, const __hc32 x) { … } static inline u32 hc32_to_cpup(const struct fotg210_hcd *fotg210, const __hc32 *x) { … } /*-------------------------------------------------------------------------*/ static inline unsigned fotg210_read_frame_index(struct fotg210_hcd *fotg210) { … } /*-------------------------------------------------------------------------*/ #endif /* __LINUX_FOTG210_H */
Codebase Browser
linux