linux/drivers/usb/mtu3/mtu3_core.c

// SPDX-License-Identifier: GPL-2.0
/*
 * mtu3_core.c - hardware access layer and gadget init/exit of
 *                     MediaTek usb3 Dual-Role Controller Driver
 *
 * Copyright (C) 2016 MediaTek Inc.
 *
 * Author: Chunfeng Yun <[email protected]>
 */

#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/platform_device.h>

#include "mtu3.h"
#include "mtu3_dr.h"
#include "mtu3_debug.h"
#include "mtu3_trace.h"

static int ep_fifo_alloc(struct mtu3_ep *mep, u32 seg_size)
{ … }

static void ep_fifo_free(struct mtu3_ep *mep)
{ … }

/* enable/disable U3D SS function */
static inline void mtu3_ss_func_set(struct mtu3 *mtu, bool enable)
{ … }

/* set/clear U3D HS device soft connect */
static inline void mtu3_hs_softconn_set(struct mtu3 *mtu, bool enable)
{ … }

/* only port0 of U2/U3 supports device mode */
static int mtu3_device_enable(struct mtu3 *mtu)
{ … }

static void mtu3_device_disable(struct mtu3 *mtu)
{ … }

static void mtu3_dev_power_on(struct mtu3 *mtu)
{ … }

static void mtu3_dev_power_down(struct mtu3 *mtu)
{ … }

/* reset U3D's device module. */
static void mtu3_device_reset(struct mtu3 *mtu)
{ … }

static void mtu3_intr_status_clear(struct mtu3 *mtu)
{ … }

/* disable all interrupts */
static void mtu3_intr_disable(struct mtu3 *mtu)
{ … }

/* enable system global interrupt */
static void mtu3_intr_enable(struct mtu3 *mtu)
{ … }

static void mtu3_set_speed(struct mtu3 *mtu, enum usb_device_speed speed)
{ … }

/* CSR registers will be reset to default value if port is disabled */
static void mtu3_csr_init(struct mtu3 *mtu)
{ … }

/* reset: u2 - data toggle, u3 - SeqN, flow control status etc */
static void mtu3_ep_reset(struct mtu3_ep *mep)
{ … }

/* set/clear the stall and toggle bits for non-ep0 */
void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set)
{ … }

void mtu3_dev_on_off(struct mtu3 *mtu, int is_on)
{ … }

void mtu3_start(struct mtu3 *mtu)
{ … }

void mtu3_stop(struct mtu3 *mtu)
{ … }

static void mtu3_dev_suspend(struct mtu3 *mtu)
{ … }

static void mtu3_dev_resume(struct mtu3 *mtu)
{ … }

/* for non-ep0 */
int mtu3_config_ep(struct mtu3 *mtu, struct mtu3_ep *mep,
			int interval, int burst, int mult)
{ … }

/* for non-ep0 */
void mtu3_deconfig_ep(struct mtu3 *mtu, struct mtu3_ep *mep)
{ … }

/*
 * Two scenarios:
 * 1. when device IP supports SS, the fifo of EP0, TX EPs, RX EPs
 *	are separated;
 * 2. when supports only HS, the fifo is shared for all EPs, and
 *	the capability registers of @EPNTXFFSZ or @EPNRXFFSZ indicate
 *	the total fifo size of non-ep0, and ep0's is fixed to 64B,
 *	so the total fifo size is 64B + @EPNTXFFSZ;
 *	Due to the first 64B should be reserved for EP0, non-ep0's fifo
 *	starts from offset 64 and are divided into two equal parts for
 *	TX or RX EPs for simplification.
 */
static void get_ep_fifo_config(struct mtu3 *mtu)
{ … }

static void mtu3_ep0_setup(struct mtu3 *mtu)
{ … }

static int mtu3_mem_alloc(struct mtu3 *mtu)
{ … }

static void mtu3_mem_free(struct mtu3 *mtu)
{ … }

static void mtu3_regs_init(struct mtu3 *mtu)
{ … }

static irqreturn_t mtu3_link_isr(struct mtu3 *mtu)
{ … }

static irqreturn_t mtu3_u3_ltssm_isr(struct mtu3 *mtu)
{ … }

static irqreturn_t mtu3_u2_common_isr(struct mtu3 *mtu)
{ … }

static irqreturn_t mtu3_irq(int irq, void *data)
{ … }

static void mtu3_check_params(struct mtu3 *mtu)
{ … }

static int mtu3_hw_init(struct mtu3 *mtu)
{ … }

static void mtu3_hw_exit(struct mtu3 *mtu)
{ … }

/*
 * we set 32-bit DMA mask by default, here check whether the controller
 * supports 36-bit DMA or not, if it does, set 36-bit DMA mask.
 */
static int mtu3_set_dma_mask(struct mtu3 *mtu)
{ … }

int ssusb_gadget_init(struct ssusb_mtk *ssusb)
{ … }

void ssusb_gadget_exit(struct ssusb_mtk *ssusb)
{ … }

bool ssusb_gadget_ip_sleep_check(struct ssusb_mtk *ssusb)
{ … }

int ssusb_gadget_suspend(struct ssusb_mtk *ssusb, pm_message_t msg)
{ … }

int ssusb_gadget_resume(struct ssusb_mtk *ssusb, pm_message_t msg)
{ … }