linux/drivers/usb/host/xhci-pci.c

// SPDX-License-Identifier: GPL-2.0
/*
 * xHCI host controller driver PCI Bus Glue.
 *
 * Copyright (C) 2008 Intel Corp.
 *
 * Author: Sarah Sharp
 * Some code borrowed from the Linux EHCI driver.
 */

#include <linux/pci.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/acpi.h>
#include <linux/reset.h>
#include <linux/suspend.h>

#include "xhci.h"
#include "xhci-trace.h"
#include "xhci-pci.h"

#define SSIC_PORT_NUM
#define SSIC_PORT_CFG2
#define SSIC_PORT_CFG2_OFFSET
#define PROG_DONE
#define SSIC_PORT_UNUSED
#define SPARSE_DISABLE_BIT
#define SPARSE_CNTL_ENABLE

/* Device for a quirk */
#define PCI_VENDOR_ID_FRESCO_LOGIC
#define PCI_DEVICE_ID_FRESCO_LOGIC_PDK
#define PCI_DEVICE_ID_FRESCO_LOGIC_FL1009
#define PCI_DEVICE_ID_FRESCO_LOGIC_FL1100
#define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400

#define PCI_VENDOR_ID_ETRON
#define PCI_DEVICE_ID_EJ168
#define PCI_DEVICE_ID_EJ188

#define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI
#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI
#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_XHCI
#define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI
#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI
#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI
#define PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI
#define PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI
#define PCI_DEVICE_ID_INTEL_APOLLO_LAKE_XHCI
#define PCI_DEVICE_ID_INTEL_DENVERTON_XHCI
#define PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI
#define PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI
#define PCI_DEVICE_ID_INTEL_TIGER_LAKE_PCH_XHCI
#define PCI_DEVICE_ID_INTEL_COMET_LAKE_XHCI
#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI
#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_N_PCH_XHCI

/* Thunderbolt */
#define PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI
#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_XHCI
#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_XHCI
#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_XHCI
#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_XHCI
#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_XHCI
#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_XHCI
#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_XHCI
#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI

#define PCI_DEVICE_ID_AMD_RENOIR_XHCI
#define PCI_DEVICE_ID_AMD_PROMONTORYA_4
#define PCI_DEVICE_ID_AMD_PROMONTORYA_3
#define PCI_DEVICE_ID_AMD_PROMONTORYA_2
#define PCI_DEVICE_ID_AMD_PROMONTORYA_1

#define PCI_DEVICE_ID_ASMEDIA_1042_XHCI
#define PCI_DEVICE_ID_ASMEDIA_1042A_XHCI
#define PCI_DEVICE_ID_ASMEDIA_1142_XHCI
#define PCI_DEVICE_ID_ASMEDIA_2142_XHCI
#define PCI_DEVICE_ID_ASMEDIA_3242_XHCI

static const char hcd_name[] =;

static struct hc_driver __read_mostly xhci_pci_hc_driver;

static int xhci_pci_setup(struct usb_hcd *hcd);
static int xhci_pci_run(struct usb_hcd *hcd);
static int xhci_pci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
				      struct usb_tt *tt, gfp_t mem_flags);

static const struct xhci_driver_overrides xhci_pci_overrides __initconst =;

static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
{}

/* Free any IRQs and disable MSI-X */
static void xhci_cleanup_msix(struct xhci_hcd *xhci)
{}

/* Try enabling MSI-X with MSI and legacy IRQ as fallback */
static int xhci_try_enable_msi(struct usb_hcd *hcd)
{}

static int xhci_pci_run(struct usb_hcd *hcd)
{}

static void xhci_pci_stop(struct usb_hcd *hcd)
{}

/* called after powerup, by probe or system-pm "wakeup" */
static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
{}

static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
{}

#ifdef CONFIG_ACPI
static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev)
{}

static void xhci_find_lpm_incapable_ports(struct usb_hcd *hcd, struct usb_device *hdev)
{}

#else
static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { }
static void xhci_find_lpm_incapable_ports(struct usb_hcd *hcd, struct usb_device *hdev) { }
#endif /* CONFIG_ACPI */

/* called during probe() after chip reset completes */
static int xhci_pci_setup(struct usb_hcd *hcd)
{}

static int xhci_pci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
				      struct usb_tt *tt, gfp_t mem_flags)
{}

/*
 * We need to register our own PCI probe function (instead of the USB core's
 * function) in order to create a second roothub under xHCI.
 */
static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
{}

static void xhci_pci_remove(struct pci_dev *dev)
{}

/*
 * In some Intel xHCI controllers, in order to get D3 working,
 * through a vendor specific SSIC CONFIG register at offset 0x883c,
 * SSIC PORT need to be marked as "unused" before putting xHCI
 * into D3. After D3 exit, the SSIC port need to be marked as "used".
 * Without this change, xHCI might not enter D3 state.
 */
static void xhci_ssic_port_unused_quirk(struct usb_hcd *hcd, bool suspend)
{}

/*
 * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
 * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
 */
static void xhci_pme_quirk(struct usb_hcd *hcd)
{}

static void xhci_sparse_control_quirk(struct usb_hcd *hcd)
{}

static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
{}

static int xhci_pci_resume(struct usb_hcd *hcd, pm_message_t msg)
{}

static int xhci_pci_poweroff_late(struct usb_hcd *hcd, bool do_wakeup)
{}

static void xhci_pci_shutdown(struct usb_hcd *hcd)
{}

/*-------------------------------------------------------------------------*/

static const struct xhci_driver_data reneses_data =;

/* PCI driver selection metadata; PCI hotplugging uses this */
static const struct pci_device_id pci_ids[] =;
MODULE_DEVICE_TABLE(pci, pci_ids);

/*
 * Without CONFIG_USB_XHCI_PCI_RENESAS renesas_xhci_check_request_fw() won't
 * load firmware, so don't encumber the xhci-pci driver with it.
 */
#if IS_ENABLED(CONFIG_USB_XHCI_PCI_RENESAS)
MODULE_FIRMWARE();
#endif

/* pci driver glue; this is a "new style" PCI driver module */
static struct pci_driver xhci_pci_driver =;

static int __init xhci_pci_init(void)
{}
module_init();

static void __exit xhci_pci_exit(void)
{}
module_exit(xhci_pci_exit);

MODULE_DESCRIPTION();
MODULE_LICENSE();