// SPDX-License-Identifier: GPL-2.0 /* * MediaTek xHCI Host Controller Driver * * Copyright (c) 2015 MediaTek Inc. * Author: * Chunfeng Yun <[email protected]> */ #include <linux/bitfield.h> #include <linux/dma-mapping.h> #include <linux/iopoll.h> #include <linux/kernel.h> #include <linux/mfd/syscon.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/pm_wakeirq.h> #include <linux/regmap.h> #include <linux/regulator/consumer.h> #include <linux/reset.h> #include "xhci.h" #include "xhci-mtk.h" /* ip_pw_ctrl0 register */ #define CTRL0_IP_SW_RST … /* ip_pw_ctrl1 register */ #define CTRL1_IP_HOST_PDN … /* ip_pw_ctrl2 register */ #define CTRL2_IP_DEV_PDN … /* ip_pw_sts1 register */ #define STS1_IP_SLEEP_STS … #define STS1_U3_MAC_RST … #define STS1_XHCI_RST … #define STS1_SYS125_RST … #define STS1_REF_RST … #define STS1_SYSPLL_STABLE … /* ip_xhci_cap register */ #define CAP_U3_PORT_NUM(p) … #define CAP_U2_PORT_NUM(p) … /* u3_ctrl_p register */ #define CTRL_U3_PORT_HOST_SEL … #define CTRL_U3_PORT_PDN … #define CTRL_U3_PORT_DIS … /* u2_ctrl_p register */ #define CTRL_U2_PORT_HOST_SEL … #define CTRL_U2_PORT_PDN … #define CTRL_U2_PORT_DIS … /* u2_phy_pll register */ #define CTRL_U2_FORCE_PLL_STB … /* xHCI CSR */ #define LS_EOF_CFG … #define LSEOF_OFFSET … #define FS_EOF_CFG … #define FSEOF_OFFSET … #define SS_GEN1_EOF_CFG … #define SSG1EOF_OFFSET … #define HFCNTR_CFG … #define ITP_DELTA_CLK … #define ITP_DELTA_CLK_MASK … #define FRMCNT_LEV1_RANG … #define FRMCNT_LEV1_RANG_MASK … #define HSCH_CFG1 … #define SCH3_RXFIFO_DEPTH_MASK … #define SS_GEN2_EOF_CFG … #define SSG2EOF_OFFSET … #define XSEOF_OFFSET_MASK … /* usb remote wakeup registers in syscon */ /* mt8173 etc */ #define PERI_WK_CTRL1 … #define WC1_IS_C(x) … #define WC1_IS_EN … #define WC1_IS_P … /* mt8183 */ #define PERI_WK_CTRL0 … #define WC0_IS_C(x) … #define WC0_IS_P … #define WC0_IS_EN … /* mt8192 */ #define WC0_SSUSB0_CDEN … #define WC0_IS_SPM_EN … /* mt8195 */ #define PERI_WK_CTRL0_8195 … #define WC0_IS_P_95 … #define WC0_IS_C_95(x) … #define WC0_IS_EN_P3_95 … #define WC0_IS_EN_P2_95 … #define WC0_IS_EN_P1_95 … #define PERI_WK_CTRL1_8195 … #define WC1_IS_C_95(x) … #define WC1_IS_P_95 … #define WC1_IS_EN_P0_95 … /* mt2712 etc */ #define PERI_SSUSB_SPM_CTRL … #define SSC_IP_SLEEP_EN … #define SSC_SPM_INT_EN … #define SCH_FIFO_TO_KB(x) … enum ssusb_uwk_vers { … }; /* * MT8195 has 4 controllers, the controller1~3's default SOF/ITP interval * is calculated from the frame counter clock 24M, but in fact, the clock * is 48M, add workaround for it. */ static void xhci_mtk_set_frame_interval(struct xhci_hcd_mtk *mtk) { … } /* * workaround: usb3.2 gen1 isoc rx hw issue * host send out unexpected ACK afer device fininsh a burst transfer with * a short packet. */ static void xhci_mtk_rxfifo_depth_set(struct xhci_hcd_mtk *mtk) { … } static void xhci_mtk_init_quirk(struct xhci_hcd_mtk *mtk) { … } static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk) { … } static int xhci_mtk_host_disable(struct xhci_hcd_mtk *mtk) { … } static int xhci_mtk_ssusb_config(struct xhci_hcd_mtk *mtk) { … } /* only clocks can be turn off for ip-sleep wakeup mode */ static void usb_wakeup_ip_sleep_set(struct xhci_hcd_mtk *mtk, bool enable) { … } static int usb_wakeup_of_property_parse(struct xhci_hcd_mtk *mtk, struct device_node *dn) { … } static void usb_wakeup_set(struct xhci_hcd_mtk *mtk, bool enable) { … } static int xhci_mtk_clks_get(struct xhci_hcd_mtk *mtk) { … } static int xhci_mtk_vregs_get(struct xhci_hcd_mtk *mtk) { … } static void xhci_mtk_quirks(struct device *dev, struct xhci_hcd *xhci) { … } /* called during probe() after chip reset completes */ static int xhci_mtk_setup(struct usb_hcd *hcd) { … } static const struct xhci_driver_overrides xhci_mtk_overrides __initconst = …; static struct hc_driver __read_mostly xhci_mtk_hc_driver; static int xhci_mtk_probe(struct platform_device *pdev) { … } static void xhci_mtk_remove(struct platform_device *pdev) { … } static int __maybe_unused xhci_mtk_suspend(struct device *dev) { … } static int __maybe_unused xhci_mtk_resume(struct device *dev) { … } static int __maybe_unused xhci_mtk_runtime_suspend(struct device *dev) { … } static int __maybe_unused xhci_mtk_runtime_resume(struct device *dev) { … } static const struct dev_pm_ops xhci_mtk_pm_ops = …; #define DEV_PM_OPS … static const struct of_device_id mtk_xhci_of_match[] = …; MODULE_DEVICE_TABLE(of, mtk_xhci_of_match); static struct platform_driver mtk_xhci_driver = …; static int __init xhci_mtk_init(void) { … } module_init(…) …; static void __exit xhci_mtk_exit(void) { … } module_exit(xhci_mtk_exit); MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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