/* SPDX-License-Identifier: GPL-2.0 */ /* * xhci-dbc.h - xHCI debug capability early driver * * Copyright (C) 2016 Intel Corporation * * Author: Lu Baolu <[email protected]> */ #ifndef __LINUX_XHCI_DBC_H #define __LINUX_XHCI_DBC_H #include <linux/types.h> #include <linux/usb/ch9.h> /* * xHCI Debug Capability Register interfaces: */ struct xdbc_regs { … }; #define DEBUG_MAX_BURST(p) … #define CTRL_DBC_RUN … #define CTRL_PORT_ENABLE … #define CTRL_HALT_OUT_TR … #define CTRL_HALT_IN_TR … #define CTRL_DBC_RUN_CHANGE … #define CTRL_DBC_ENABLE … #define DCST_DEBUG_PORT(p) … #define PORTSC_CONN_STATUS … #define PORTSC_CONN_CHANGE … #define PORTSC_RESET_CHANGE … #define PORTSC_LINK_CHANGE … #define PORTSC_CONFIG_CHANGE … /* * xHCI Debug Capability data structures: */ struct xdbc_trb { … }; struct xdbc_erst_entry { … }; struct xdbc_info_context { … }; struct xdbc_ep_context { … }; struct xdbc_context { … }; #define XDBC_INFO_CONTEXT_SIZE … #define XDBC_MAX_STRING_LENGTH … #define XDBC_STRING_MANUFACTURER … #define XDBC_STRING_PRODUCT … #define XDBC_STRING_SERIAL … struct xdbc_strings { … }; #define XDBC_PROTOCOL … #define XDBC_VENDOR_ID … #define XDBC_PRODUCT_ID … #define XDBC_DEVICE_REV … /* * xHCI Debug Capability software state structures: */ struct xdbc_segment { … }; #define XDBC_TRBS_PER_SEGMENT … struct xdbc_ring { … }; /* * These are the "Endpoint ID" (also known as "Context Index") values for the * OUT Transfer Ring and the IN Transfer Ring of a Debug Capability Context data * structure. * According to the "eXtensible Host Controller Interface for Universal Serial * Bus (xHCI)" specification, section "7.6.3.2 Endpoint Contexts and Transfer * Rings", these should be 0 and 1, and those are the values AMD machines give * you; but Intel machines seem to use the formula from section "4.5.1 Device * Context Index", which is supposed to be used for the Device Context only. * Luckily the values from Intel don't overlap with those from AMD, so we can * just test for both. */ #define XDBC_EPID_OUT … #define XDBC_EPID_IN … #define XDBC_EPID_OUT_INTEL … #define XDBC_EPID_IN_INTEL … struct xdbc_state { … }; #define XDBC_PCI_MAX_BUSES … #define XDBC_PCI_MAX_DEVICES … #define XDBC_PCI_MAX_FUNCTION … #define XDBC_TABLE_ENTRY_SIZE … #define XDBC_ERST_ENTRY_NUM … #define XDBC_DBCC_ENTRY_NUM … #define XDBC_STRING_ENTRY_NUM … /* Bits definitions for xdbc_state.flags: */ #define XDBC_FLAGS_INITIALIZED … #define XDBC_FLAGS_IN_STALL … #define XDBC_FLAGS_OUT_STALL … #define XDBC_FLAGS_IN_PROCESS … #define XDBC_FLAGS_OUT_PROCESS … #define XDBC_FLAGS_CONFIGURED … #define XDBC_MAX_PACKET … /* Door bell target: */ #define OUT_EP_DOORBELL … #define IN_EP_DOORBELL … #define DOOR_BELL_TARGET(p) … #define xdbc_read64(regs) … #define xdbc_write64(val, regs) … #endif /* __LINUX_XHCI_DBC_H */
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