/* SPDX-License-Identifier: GPL-2.0 */ /* * Definitions for TUSB6010 USB 2.0 OTG Dual Role controller * * Copyright (C) 2006 Nokia Corporation * Tony Lindgren <[email protected]> */ #ifndef __TUSB6010_H__ #define __TUSB6010_H__ /* VLYNQ control register. 32-bit at offset 0x000 */ #define TUSB_VLYNQ_CTRL … /* Mentor Graphics OTG core registers. 8,- 16- and 32-bit at offset 0x400 */ #define TUSB_BASE_OFFSET … /* FIFO registers 32-bit at offset 0x600 */ #define TUSB_FIFO_BASE … /* Device System & Control registers. 32-bit at offset 0x800 */ #define TUSB_SYS_REG_BASE … #define TUSB_DEV_CONF … #define TUSB_DEV_CONF_USB_HOST_MODE … #define TUSB_DEV_CONF_PROD_TEST_MODE … #define TUSB_DEV_CONF_SOFT_ID … #define TUSB_DEV_CONF_ID_SEL … #define TUSB_PHY_OTG_CTRL_ENABLE … #define TUSB_PHY_OTG_CTRL … #define TUSB_PHY_OTG_CTRL_WRPROTECT … #define TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP … #define TUSB_PHY_OTG_CTRL_OTG_VBUS_DET_EN … #define TUSB_PHY_OTG_CTRL_OTG_SESS_END_EN … #define TUSB_PHY_OTG_CTRL_TESTM2 … #define TUSB_PHY_OTG_CTRL_TESTM1 … #define TUSB_PHY_OTG_CTRL_TESTM0 … #define TUSB_PHY_OTG_CTRL_TX_DATA2 … #define TUSB_PHY_OTG_CTRL_TX_GZ2 … #define TUSB_PHY_OTG_CTRL_TX_ENABLE2 … #define TUSB_PHY_OTG_CTRL_DM_PULLDOWN … #define TUSB_PHY_OTG_CTRL_DP_PULLDOWN … #define TUSB_PHY_OTG_CTRL_OSC_EN … #define TUSB_PHY_OTG_CTRL_PHYREF_CLKSEL(v) … #define TUSB_PHY_OTG_CTRL_PD … #define TUSB_PHY_OTG_CTRL_PLL_ON … #define TUSB_PHY_OTG_CTRL_EXT_RPU … #define TUSB_PHY_OTG_CTRL_PWR_GOOD … #define TUSB_PHY_OTG_CTRL_RESET … #define TUSB_PHY_OTG_CTRL_SUSPENDM … #define TUSB_PHY_OTG_CTRL_CLK_MODE … /*OTG status register */ #define TUSB_DEV_OTG_STAT … #define TUSB_DEV_OTG_STAT_PWR_CLK_GOOD … #define TUSB_DEV_OTG_STAT_SESS_END … #define TUSB_DEV_OTG_STAT_SESS_VALID … #define TUSB_DEV_OTG_STAT_VBUS_VALID … #define TUSB_DEV_OTG_STAT_VBUS_SENSE … #define TUSB_DEV_OTG_STAT_ID_STATUS … #define TUSB_DEV_OTG_STAT_HOST_DISCON … #define TUSB_DEV_OTG_STAT_LINE_STATE … #define TUSB_DEV_OTG_STAT_DP_ENABLE … #define TUSB_DEV_OTG_STAT_DM_ENABLE … #define TUSB_DEV_OTG_TIMER … #define TUSB_DEV_OTG_TIMER_ENABLE … #define TUSB_DEV_OTG_TIMER_VAL(v) … #define TUSB_PRCM_REV … /* PRCM configuration register */ #define TUSB_PRCM_CONF … #define TUSB_PRCM_CONF_SFW_CPEN … #define TUSB_PRCM_CONF_SYS_CLKSEL(v) … /* PRCM management register */ #define TUSB_PRCM_MNGMT … #define TUSB_PRCM_MNGMT_SRP_FIX_TIMER(v) … #define TUSB_PRCM_MNGMT_SRP_FIX_EN … #define TUSB_PRCM_MNGMT_VBUS_VALID_TIMER(v) … #define TUSB_PRCM_MNGMT_VBUS_VALID_FLT_EN … #define TUSB_PRCM_MNGMT_DFT_CLK_DIS … #define TUSB_PRCM_MNGMT_VLYNQ_CLK_DIS … #define TUSB_PRCM_MNGMT_OTG_SESS_END_EN … #define TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN … #define TUSB_PRCM_MNGMT_OTG_ID_PULLUP … #define TUSB_PRCM_MNGMT_15_SW_EN … #define TUSB_PRCM_MNGMT_33_SW_EN … #define TUSB_PRCM_MNGMT_5V_CPEN … #define TUSB_PRCM_MNGMT_PM_IDLE … #define TUSB_PRCM_MNGMT_DEV_IDLE … /* Wake-up source clear and mask registers */ #define TUSB_PRCM_WAKEUP_SOURCE … #define TUSB_PRCM_WAKEUP_CLEAR … #define TUSB_PRCM_WAKEUP_MASK … #define TUSB_PRCM_WAKEUP_RESERVED_BITS … #define TUSB_PRCM_WGPIO_7 … #define TUSB_PRCM_WGPIO_6 … #define TUSB_PRCM_WGPIO_5 … #define TUSB_PRCM_WGPIO_4 … #define TUSB_PRCM_WGPIO_3 … #define TUSB_PRCM_WGPIO_2 … #define TUSB_PRCM_WGPIO_1 … #define TUSB_PRCM_WGPIO_0 … #define TUSB_PRCM_WHOSTDISCON … #define TUSB_PRCM_WBUS … #define TUSB_PRCM_WNORCS … #define TUSB_PRCM_WVBUS … #define TUSB_PRCM_WID … #define TUSB_PULLUP_1_CTRL … #define TUSB_PULLUP_2_CTRL … #define TUSB_INT_CTRL_REV … #define TUSB_INT_CTRL_CONF … #define TUSB_USBIP_INT_SRC … #define TUSB_USBIP_INT_SET … #define TUSB_USBIP_INT_CLEAR … #define TUSB_USBIP_INT_MASK … #define TUSB_DMA_INT_SRC … #define TUSB_DMA_INT_SET … #define TUSB_DMA_INT_CLEAR … #define TUSB_DMA_INT_MASK … #define TUSB_GPIO_INT_SRC … #define TUSB_GPIO_INT_SET … #define TUSB_GPIO_INT_CLEAR … #define TUSB_GPIO_INT_MASK … /* NOR flash interrupt source registers */ #define TUSB_INT_SRC … #define TUSB_INT_SRC_SET … #define TUSB_INT_SRC_CLEAR … #define TUSB_INT_MASK … #define TUSB_INT_SRC_TXRX_DMA_DONE … #define TUSB_INT_SRC_USB_IP_CORE … #define TUSB_INT_SRC_OTG_TIMEOUT … #define TUSB_INT_SRC_VBUS_SENSE_CHNG … #define TUSB_INT_SRC_ID_STATUS_CHNG … #define TUSB_INT_SRC_DEV_WAKEUP … #define TUSB_INT_SRC_DEV_READY … #define TUSB_INT_SRC_USB_IP_TX … #define TUSB_INT_SRC_USB_IP_RX … #define TUSB_INT_SRC_USB_IP_VBUS_ERR … #define TUSB_INT_SRC_USB_IP_VBUS_REQ … #define TUSB_INT_SRC_USB_IP_DISCON … #define TUSB_INT_SRC_USB_IP_CONN … #define TUSB_INT_SRC_USB_IP_SOF … #define TUSB_INT_SRC_USB_IP_RST_BABBLE … #define TUSB_INT_SRC_USB_IP_RESUME … #define TUSB_INT_SRC_USB_IP_SUSPEND … /* NOR flash interrupt registers reserved bits. Must be written as 0 */ #define TUSB_INT_MASK_RESERVED_17 … #define TUSB_INT_MASK_RESERVED_13 … #define TUSB_INT_MASK_RESERVED_8 … #define TUSB_INT_SRC_RESERVED_26 … #define TUSB_INT_SRC_RESERVED_18 … #define TUSB_INT_SRC_RESERVED_10 … /* Reserved bits for NOR flash interrupt mask and clear register */ #define TUSB_INT_MASK_RESERVED_BITS … /* Reserved bits for NOR flash interrupt status register */ #define TUSB_INT_SRC_RESERVED_BITS … #define TUSB_GPIO_REV … #define TUSB_GPIO_CONF … #define TUSB_DMA_CTRL_REV … #define TUSB_DMA_REQ_CONF … #define TUSB_EP0_CONF … #define TUSB_DMA_EP_MAP … /* Offsets from each ep base register */ #define TUSB_EP_TX_OFFSET … #define TUSB_EP_RX_OFFSET … #define TUSB_EP_MAX_PACKET_SIZE_OFFSET … #define TUSB_WAIT_COUNT … #define TUSB_SCRATCH_PAD … #define TUSB_PROD_TEST_RESET … /* Device System & Control register bitfields */ #define TUSB_INT_CTRL_CONF_INT_RELCYC(v) … #define TUSB_INT_CTRL_CONF_INT_POLARITY … #define TUSB_INT_CTRL_CONF_INT_MODE … #define TUSB_GPIO_CONF_DMAREQ(v) … #define TUSB_DMA_REQ_CONF_BURST_SIZE(v) … #define TUSB_DMA_REQ_CONF_DMA_REQ_EN(v) … #define TUSB_DMA_REQ_CONF_DMA_REQ_ASSER(v) … #define TUSB_EP0_CONFIG_SW_EN … #define TUSB_EP0_CONFIG_DIR_TX … #define TUSB_EP0_CONFIG_XFR_SIZE(v) … #define TUSB_EP_CONFIG_SW_EN … #define TUSB_EP_CONFIG_XFR_SIZE(v) … #define TUSB_PROD_TEST_RESET_VAL … #define TUSB_EP_FIFO(ep) … #define TUSB_DIDR1_LO … #define TUSB_DIDR1_HI … #define TUSB_DIDR1_HI_CHIP_REV(v) … #define TUSB_DIDR1_HI_REV_20 … #define TUSB_DIDR1_HI_REV_30 … #define TUSB_DIDR1_HI_REV_31 … #define TUSB_REV_10 … #define TUSB_REV_20 … #define TUSB_REV_30 … #define TUSB_REV_31 … #endif /* __TUSB6010_H__ */
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