linux/drivers/usb/chipidea/bits.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * bits.h - register bits of the ChipIdea USB IP core
 *
 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
 *
 * Author: David Lopo
 */

#ifndef __DRIVERS_USB_CHIPIDEA_BITS_H
#define __DRIVERS_USB_CHIPIDEA_BITS_H

#include <linux/usb/ehci_def.h>

/*
 * ID
 * For 1.x revision, bit24 - bit31 are reserved
 * For 2.x revision, bit25 - bit28 are 0x2
 */
#define TAG
#define REVISION
#define VERSION
#define CIVERSION

/* SBUSCFG */
#define AHBBRST_MASK

/* HCCPARAMS */
#define HCCPARAMS_LEN

/* DCCPARAMS */
#define DCCPARAMS_DEN
#define DCCPARAMS_DC
#define DCCPARAMS_HC

/* TESTMODE */
#define TESTMODE_FORCE

/* USBCMD */
#define USBCMD_RS
#define USBCMD_RST
#define USBCMD_SUTW
#define USBCMD_ATDTW

/* USBSTS & USBINTR */
#define USBi_UI
#define USBi_UEI
#define USBi_PCI
#define USBi_URI
#define USBi_SLI

/* DEVICEADDR */
#define DEVICEADDR_USBADRA
#define DEVICEADDR_USBADR

/* TTCTRL */
#define TTCTRL_TTHA_MASK
/* Set non-zero value for internal TT Hub address representation */
#define TTCTRL_TTHA

/* BURSTSIZE */
#define RX_BURST_MASK
#define TX_BURST_MASK

/* PORTSC */
#define PORTSC_CCS
#define PORTSC_CSC
#define PORTSC_PEC
#define PORTSC_OCC
#define PORTSC_FPR
#define PORTSC_SUSP
#define PORTSC_HSP
#define PORTSC_PP
#define PORTSC_PTC
#define PORTSC_WKCN
#define PORTSC_PHCD(d)
/* PTS and PTW for non lpm version only */
#define PORTSC_PFSC
#define PORTSC_PTS(d)
#define PORTSC_PTW
#define PORTSC_STS

#define PORTSC_W1C_BITS

/* DEVLC */
#define DEVLC_PFSC
#define DEVLC_PSPD
#define DEVLC_PSPD_HS
#define DEVLC_PTW
#define DEVLC_STS
#define DEVLC_PTS(d)

/* Encoding for DEVLC_PTS and PORTSC_PTS */
#define PTS_UTMI
#define PTS_ULPI
#define PTS_SERIAL
#define PTS_HSIC

/* OTGSC */
#define OTGSC_IDPU
#define OTGSC_HADP
#define OTGSC_HABA
#define OTGSC_ID
#define OTGSC_AVV
#define OTGSC_ASV
#define OTGSC_BSV
#define OTGSC_BSE
#define OTGSC_IDIS
#define OTGSC_AVVIS
#define OTGSC_ASVIS
#define OTGSC_BSVIS
#define OTGSC_BSEIS
#define OTGSC_1MSIS
#define OTGSC_DPIS
#define OTGSC_IDIE
#define OTGSC_AVVIE
#define OTGSC_ASVIE
#define OTGSC_BSVIE
#define OTGSC_BSEIE
#define OTGSC_1MSIE
#define OTGSC_DPIE
#define OTGSC_INT_EN_BITS
#define OTGSC_INT_STATUS_BITS

/* USBMODE */
#define USBMODE_CM
#define USBMODE_CM_DC
#define USBMODE_SLOM
#define USBMODE_CI_SDIS

/* ENDPTCTRL */
#define ENDPTCTRL_RXS
#define ENDPTCTRL_RXT
#define ENDPTCTRL_RXR
#define ENDPTCTRL_RXE
#define ENDPTCTRL_TXS
#define ENDPTCTRL_TXT
#define ENDPTCTRL_TXR
#define ENDPTCTRL_TXE

#endif /* __DRIVERS_USB_CHIPIDEA_BITS_H */