/* SPDX-License-Identifier: GPL-2.0+ */ /* * bdc.h - header for the BRCM BDC USB3.0 device controller * * Copyright (C) 2014 Broadcom Corporation * * Author: Ashwini Pahuja */ #ifndef __LINUX_BDC_H__ #define __LINUX_BDC_H__ #include <linux/kernel.h> #include <linux/usb.h> #include <linux/device.h> #include <linux/spinlock.h> #include <linux/list.h> #include <linux/dma-mapping.h> #include <linux/mm.h> #include <linux/debugfs.h> #include <linux/usb/ch9.h> #include <linux/usb/gadget.h> #include <asm/unaligned.h> #define BRCM_BDC_NAME … #define BRCM_BDC_DESC … #define DMA_ADDR_INVALID … /* BDC command operation timeout in usec*/ #define BDC_CMD_TIMEOUT … /* BDC controller operation timeout in usec*/ #define BDC_COP_TIMEOUT … /* * Maximum size of ep0 response buffer for ch9 requests, * the set_sel request uses 6 so far, the max. */ #define EP0_RESPONSE_BUFF … /* Start with SS as default */ #define EP0_MAX_PKT_SIZE … /* 64 entries in a SRR */ #define NUM_SR_ENTRIES … /* Num of bds per table */ #define NUM_BDS_PER_TABLE … /* Num of tables in bd list for control,bulk and Int ep */ #define NUM_TABLES … /* Num of tables in bd list for Isoch ep */ #define NUM_TABLES_ISOCH … /* U1 Timeout default: 248usec */ #define U1_TIMEOUT … /* Interrupt coalescence in usec */ #define INT_CLS … /* Register offsets */ /* Configuration and Capability registers */ #define BDC_BDCCFG0 … #define BDC_BDCCFG1 … #define BDC_BDCCAP0 … #define BDC_BDCCAP1 … #define BDC_CMDPAR0 … #define BDC_CMDPAR1 … #define BDC_CMDPAR2 … #define BDC_CMDSC … #define BDC_USPC … #define BDC_USPPMS … #define BDC_USPPM2 … #define BDC_SPBBAL … #define BDC_SPBBAH … #define BDC_BDCSC … #define BDC_XSFNTF … #define BDC_DVCSA … #define BDC_DVCSB … #define BDC_EPSTS0 … #define BDC_EPSTS1 … #define BDC_EPSTS2 … #define BDC_EPSTS3 … #define BDC_EPSTS4 … #define BDC_EPSTS5 … #define BDC_EPSTS6 … #define BDC_EPSTS7 … #define BDC_SRRBAL(n) … #define BDC_SRRBAH(n) … #define BDC_SRRINT(n) … #define BDC_INTCTLS(n) … /* Extended capability regs */ #define BDC_FSCNOC … #define BDC_FSCNIC … #define NUM_NCS(p) … /* Register bit fields and Masks */ /* BDC Configuration 0 */ #define BDC_PGS(p) … #define BDC_SPB(p) … /* BDC Capability1 */ #define BDC_P64 … /* BDC Command register */ #define BDC_CMD_FH … #define BDC_CMD_DNC … #define BDC_CMD_EPO … #define BDC_CMD_BLA … #define BDC_CMD_EPC … #define BDC_CMD_DVC … #define BDC_CMD_CWS … #define BDC_CMD_CST(p) … #define BDC_CMD_EPN(p) … #define BDC_SUB_CMD_ADD … #define BDC_SUB_CMD_FWK … /* Reset sequence number */ #define BDC_CMD_EPO_RST_SN … #define BDC_CMD_EP0_XSD … #define BDC_SUB_CMD_ADD_EP … #define BDC_SUB_CMD_DRP_EP … #define BDC_SUB_CMD_EP_STP … #define BDC_SUB_CMD_EP_STL … #define BDC_SUB_CMD_EP_RST … #define BDC_CMD_SRD … /* CMD completion status */ #define BDC_CMDS_SUCC … #define BDC_CMDS_PARA … #define BDC_CMDS_STAT … #define BDC_CMDS_FAIL … #define BDC_CMDS_INTL … #define BDC_CMDS_BUSY … /* CMDSC Param 2 shifts */ #define EPT_SHIFT … #define MP_SHIFT … #define MB_SHIFT … #define EPM_SHIFT … /* BDC USPSC */ #define BDC_VBC … #define BDC_PRC … #define BDC_PCE … #define BDC_CFC … #define BDC_PCC … #define BDC_PSC … #define BDC_VBS … #define BDC_PRS … #define BDC_PCS … #define BDC_PSP(p) … #define BDC_SCN … #define BDC_SDC … #define BDC_SWS … #define BDC_USPSC_RW … #define BDC_PSP(p) … #define BDC_SPEED_FS … #define BDC_SPEED_LS … #define BDC_SPEED_HS … #define BDC_SPEED_SS … #define BDC_PST(p) … #define BDC_PST_MASK … /* USPPMS */ #define BDC_U2E … #define BDC_U1E … #define BDC_U2A … #define BDC_PORT_W1S … #define BDC_U1T(p) … #define BDC_U2T(p) … #define BDC_U1T_MASK … /* USBPM2 */ /* Hardware LPM Enable */ #define BDC_HLE … /* BDC Status and Control */ #define BDC_COP_RST … #define BDC_COP_RUN … #define BDC_COP_STP … #define BDC_COP_MASK … #define BDC_COS … #define BDC_CSTS(p) … #define BDC_MASK_MCW … #define BDC_GIE … #define BDC_GIP … #define BDC_HLT … #define BDC_NOR … #define BDC_OIP … /* Buffer descriptor and Status report bit fields and masks */ #define BD_TYPE_BITMASK … #define BD_CHAIN … #define BD_TFS_SHIFT … #define BD_SOT … #define BD_EOT … #define BD_ISP … #define BD_IOC … #define BD_SBF … #define BD_INTR_TARGET(p) … #define BDC_SRR_RWS … #define BDC_SRR_RST … #define BDC_SRR_ISR … #define BDC_SRR_IE … #define BDC_SRR_IP … #define BDC_SRR_EPI(p) … #define BDC_SRR_DPI(p) … #define BDC_SRR_DPI_MASK … #define MARK_CHAIN_BD … /* Control transfer BD specific fields */ #define BD_DIR_IN … #define BDC_PTC_MASK … /* status report defines */ #define SR_XSF … #define SR_USPC … #define SR_BD_LEN(p) … #define XSF_SUCC … #define XSF_SHORT … #define XSF_BABB … #define XSF_SETUP_RECV … #define XSF_DATA_START … #define XSF_STATUS_START … #define XSF_STS(p) … /* Transfer BD fields */ #define BD_LEN(p) … #define BD_LTF … #define BD_TYPE_DS … #define BD_TYPE_SS … #define BDC_EP_ENABLED … #define BDC_EP_STALL … #define BDC_EP_STOP … /* One BD can transfer max 65536 bytes */ #define BD_MAX_BUFF_SIZE … /* Maximum bytes in one XFR, Refer to BDC spec */ #define MAX_XFR_LEN … /* defines for Force Header command */ #define DEV_NOTF_TYPE … #define FWK_SUBTYPE … #define TRA_PACKET … #define to_bdc_ep(e) … #define to_bdc_req(r) … #define gadget_to_bdc(g) … /* FUNCTION WAKE DEV NOTIFICATION interval, USB3 spec table 8.13 */ #define BDC_TNOTIFY … /* Devstatus bitfields */ #define REMOTE_WAKEUP_ISSUED … #define DEVICE_SUSPENDED … #define FUNC_WAKE_ISSUED … #define REMOTE_WAKE_ENABLE … /* On disconnect, preserve these bits and clear rest */ #define DEVSTATUS_CLEAR … /* Hardware and software Data structures */ /* Endpoint bd: buffer descriptor */ struct bdc_bd { … }; /* Status report in Status report ring(srr) */ struct bdc_sr { … }; /* bd_table: contiguous bd's in a table */ struct bd_table { … }; /* * Each endpoint has a bdl(buffer descriptor list), bdl consists of 1 or more bd * table's chained to each other through a chain bd, every table has equal * number of bds. the software uses bdi(bd index) to refer to particular bd in * the list. */ struct bd_list { … }; struct bdc_req; /* Representation of a transfer, one transfer can have multiple bd's */ struct bd_transfer { … }; /* * Representation of a gadget request, every gadget request is contained * by 1 bd_transfer. */ struct bdc_req { … }; /* scratchpad buffer needed by bdc hardware */ struct bdc_scratchpad { … }; /* endpoint representation */ struct bdc_ep { … }; /* bdc cmmand parameter structure */ struct bdc_cmd_params { … }; /* status report ring(srr), currently one srr is supported for entire system */ struct srr { … }; /* EP0 states */ enum bdc_ep0_state { … }; /* Link states */ enum bdc_link_state { … }; /* representation of bdc */ struct bdc { … }; static inline u32 bdc_readl(void __iomem *base, u32 offset) { … } static inline void bdc_writel(void __iomem *base, u32 offset, u32 value) { … } /* Buffer descriptor list operations */ void bdc_notify_xfr(struct bdc *bdc, u32 epnum); void bdc_softconn(struct bdc *bdc); void bdc_softdisconn(struct bdc *bdc); int bdc_run(struct bdc *bdc); int bdc_stop(struct bdc *bdc); int bdc_reset(struct bdc *bdc); int bdc_udc_init(struct bdc *bdc); void bdc_udc_exit(struct bdc *bdc); int bdc_reinit(struct bdc *bdc); /* Status report handlers */ /* Upstream port status change sr */ void bdc_sr_uspc(struct bdc *bdc, struct bdc_sr *sreport); /* transfer sr */ void bdc_sr_xsf(struct bdc *bdc, struct bdc_sr *sreport); /* EP0 XSF handlers */ void bdc_xsf_ep0_setup_recv(struct bdc *bdc, struct bdc_sr *sreport); void bdc_xsf_ep0_data_start(struct bdc *bdc, struct bdc_sr *sreport); void bdc_xsf_ep0_status_start(struct bdc *bdc, struct bdc_sr *sreport); #endif /* __LINUX_BDC_H__ */
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