// SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2011 Marvell International Ltd. All rights reserved. */ #ifndef __MV_UDC_H #define __MV_UDC_H #define VUSBHS_MAX_PORTS … #define DQH_ALIGNMENT … #define DTD_ALIGNMENT … #define DMA_BOUNDARY … #define EP_DIR_IN … #define EP_DIR_OUT … #define DMA_ADDR_INVALID … #define EP0_MAX_PKT_SIZE … /* ep0 transfer state */ #define WAIT_FOR_SETUP … #define DATA_STATE_XMIT … #define DATA_STATE_NEED_ZLP … #define WAIT_FOR_OUT_STATUS … #define DATA_STATE_RECV … #define CAPLENGTH_MASK … #define DCCPARAMS_DEN_MASK … #define HCSPARAMS_PPC … /* Frame Index Register Bit Masks */ #define USB_FRINDEX_MASKS … /* Command Register Bit Masks */ #define USBCMD_RUN_STOP … #define USBCMD_CTRL_RESET … #define USBCMD_SETUP_TRIPWIRE_SET … #define USBCMD_SETUP_TRIPWIRE_CLEAR … #define USBCMD_ATDTW_TRIPWIRE_SET … #define USBCMD_ATDTW_TRIPWIRE_CLEAR … /* bit 15,3,2 are for frame list size */ #define USBCMD_FRAME_SIZE_1024 … #define USBCMD_FRAME_SIZE_512 … #define USBCMD_FRAME_SIZE_256 … #define USBCMD_FRAME_SIZE_128 … #define USBCMD_FRAME_SIZE_64 … #define USBCMD_FRAME_SIZE_32 … #define USBCMD_FRAME_SIZE_16 … #define USBCMD_FRAME_SIZE_8 … #define EPCTRL_TX_ALL_MASK … #define EPCTRL_RX_ALL_MASK … #define EPCTRL_TX_DATA_TOGGLE_RST … #define EPCTRL_TX_EP_STALL … #define EPCTRL_RX_EP_STALL … #define EPCTRL_RX_DATA_TOGGLE_RST … #define EPCTRL_RX_ENABLE … #define EPCTRL_TX_ENABLE … #define EPCTRL_CONTROL … #define EPCTRL_ISOCHRONOUS … #define EPCTRL_BULK … #define EPCTRL_INT … #define EPCTRL_TX_TYPE … #define EPCTRL_RX_TYPE … #define EPCTRL_DATA_TOGGLE_INHIBIT … #define EPCTRL_TX_EP_TYPE_SHIFT … #define EPCTRL_RX_EP_TYPE_SHIFT … #define EPCOMPLETE_MAX_ENDPOINTS … /* endpoint list address bit masks */ #define USB_EP_LIST_ADDRESS_MASK … #define PORTSCX_W1C_BITS … #define PORTSCX_PORT_RESET … #define PORTSCX_PORT_POWER … #define PORTSCX_FORCE_FULL_SPEED_CONNECT … #define PORTSCX_PAR_XCVR_SELECT … #define PORTSCX_PORT_FORCE_RESUME … #define PORTSCX_PORT_SUSPEND … #define PORTSCX_PORT_SPEED_FULL … #define PORTSCX_PORT_SPEED_LOW … #define PORTSCX_PORT_SPEED_HIGH … #define PORTSCX_PORT_SPEED_MASK … /* USB MODE Register Bit Masks */ #define USBMODE_CTRL_MODE_IDLE … #define USBMODE_CTRL_MODE_DEVICE … #define USBMODE_CTRL_MODE_HOST … #define USBMODE_CTRL_MODE_RSV … #define USBMODE_SETUP_LOCK_OFF … #define USBMODE_STREAM_DISABLE … /* USB STS Register Bit Masks */ #define USBSTS_INT … #define USBSTS_ERR … #define USBSTS_PORT_CHANGE … #define USBSTS_FRM_LST_ROLL … #define USBSTS_SYS_ERR … #define USBSTS_IAA … #define USBSTS_RESET … #define USBSTS_SOF … #define USBSTS_SUSPEND … #define USBSTS_HC_HALTED … #define USBSTS_RCL … #define USBSTS_PERIODIC_SCHEDULE … #define USBSTS_ASYNC_SCHEDULE … /* Interrupt Enable Register Bit Masks */ #define USBINTR_INT_EN … #define USBINTR_ERR_INT_EN … #define USBINTR_PORT_CHANGE_DETECT_EN … #define USBINTR_ASYNC_ADV_AAE … #define USBINTR_ASYNC_ADV_AAE_ENABLE … #define USBINTR_ASYNC_ADV_AAE_DISABLE … #define USBINTR_RESET_EN … #define USBINTR_SOF_UFRAME_EN … #define USBINTR_DEVICE_SUSPEND … #define USB_DEVICE_ADDRESS_MASK … #define USB_DEVICE_ADDRESS_BIT_SHIFT … struct mv_cap_regs { … }; struct mv_op_regs { … }; struct mv_udc { … }; /* endpoint data structure */ struct mv_ep { … }; /* request data structure */ struct mv_req { … }; #define EP_QUEUE_HEAD_MULT_POS … #define EP_QUEUE_HEAD_ZLT_SEL … #define EP_QUEUE_HEAD_MAX_PKT_LEN_POS … #define EP_QUEUE_HEAD_MAX_PKT_LEN(ep_info) … #define EP_QUEUE_HEAD_IOS … #define EP_QUEUE_HEAD_NEXT_TERMINATE … #define EP_QUEUE_HEAD_IOC … #define EP_QUEUE_HEAD_MULTO … #define EP_QUEUE_HEAD_STATUS_HALT … #define EP_QUEUE_HEAD_STATUS_ACTIVE … #define EP_QUEUE_CURRENT_OFFSET_MASK … #define EP_QUEUE_HEAD_NEXT_POINTER_MASK … #define EP_QUEUE_FRINDEX_MASK … #define EP_MAX_LENGTH_TRANSFER … struct mv_dqh { … }; #define DTD_NEXT_TERMINATE … #define DTD_IOC … #define DTD_STATUS_ACTIVE … #define DTD_STATUS_HALTED … #define DTD_STATUS_DATA_BUFF_ERR … #define DTD_STATUS_TRANSACTION_ERR … #define DTD_RESERVED_FIELDS … #define DTD_ERROR_MASK … #define DTD_ADDR_MASK … #define DTD_PACKET_SIZE … #define DTD_LENGTH_BIT_POS … struct mv_dtd { … }; #endif
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