/* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/drivers/video/cyber2000fb.h * * Copyright (C) 1998-2000 Russell King * * Integraphics Cyber2000 frame buffer device */ /* * Internal CyberPro sizes and offsets. */ #define MMIO_OFFSET … #define MMIO_SIZE … #define NR_PALETTE … #if defined(DEBUG) && defined(CONFIG_DEBUG_LL) static void debug_printf(char *fmt, ...) { extern void printascii(const char *); char buffer[128]; va_list ap; va_start(ap, fmt); vsprintf(buffer, fmt, ap); va_end(ap); printascii(buffer); } #else #define debug_printf(x...) … #endif #define RAMDAC_RAMPWRDN … #define RAMDAC_DAC8BIT … #define RAMDAC_VREFEN … #define RAMDAC_BYPASS … #define RAMDAC_DACPWRDN … #define EXT_CRT_VRTOFL … #define EXT_CRT_VRTOFL_LINECOMP10 … #define EXT_CRT_VRTOFL_INTERLACE … #define EXT_CRT_IRQ … #define EXT_CRT_IRQ_ENABLE … #define EXT_CRT_IRQ_ACT_HIGH … #define EXT_CRT_TEST … #define EXT_SYNC_CTL … #define EXT_SYNC_CTL_HS_NORMAL … #define EXT_SYNC_CTL_HS_0 … #define EXT_SYNC_CTL_HS_1 … #define EXT_SYNC_CTL_HS_HSVS … #define EXT_SYNC_CTL_VS_NORMAL … #define EXT_SYNC_CTL_VS_0 … #define EXT_SYNC_CTL_VS_1 … #define EXT_SYNC_CTL_VS_COMP … #define EXT_BUS_CTL … #define EXT_BUS_CTL_LIN_1MB … #define EXT_BUS_CTL_LIN_2MB … #define EXT_BUS_CTL_LIN_4MB … #define EXT_BUS_CTL_ZEROWAIT … #define EXT_BUS_CTL_PCIBURST_WRITE … #define EXT_BUS_CTL_PCIBURST_READ … #define EXT_SEG_WRITE_PTR … #define EXT_SEG_READ_PTR … #define EXT_BIU_MISC … #define EXT_BIU_MISC_LIN_ENABLE … #define EXT_BIU_MISC_COP_ENABLE … #define EXT_BIU_MISC_COP_BFC … #define EXT_FUNC_CTL … #define EXT_FUNC_CTL_EXTREGENBL … #define PCI_BM_CTL … #define PCI_BM_CTL_ENABLE … #define PCI_BM_CTL_BURST … #define PCI_BM_CTL_BACK2BACK … #define PCI_BM_CTL_DUMMY … #define X_V2_VID_MEM_START … #define X_V2_VID_SRC_WIDTH … #define X_V2_X_START … #define X_V2_X_END … #define X_V2_Y_START … #define X_V2_Y_END … #define X_V2_VID_SRC_WIN_WIDTH … #define Y_V2_DDA_X_INC … #define Y_V2_DDA_Y_INC … #define Y_V2_VID_FIFO_CTL … #define Y_V2_VID_FMT … #define Y_V2_VID_DISP_CTL1 … #define Y_V2_VID_FIFO_CTL1 … #define J_X2_VID_MEM_START … #define J_X2_VID_SRC_WIDTH … #define J_X2_X_START … #define J_X2_X_END … #define J_X2_Y_START … #define J_X2_Y_END … #define J_X2_VID_SRC_WIN_WIDTH … #define K_X2_DDA_X_INIT … #define K_X2_DDA_X_INC … #define K_X2_DDA_Y_INIT … #define K_X2_DDA_Y_INC … #define K_X2_VID_FMT … #define K_X2_VID_DISP_CTL1 … #define K_CAP_X2_CTL1 … #define CURS_H_START … #define CURS_H_PRESET … #define CURS_V_START … #define CURS_V_PRESET … #define CURS_CTL … #define EXT_ATTRIB_CTL … #define EXT_ATTRIB_CTL_EXT … #define EXT_OVERSCAN_RED … #define EXT_OVERSCAN_GREEN … #define EXT_OVERSCAN_BLUE … #define CAP_X_START … #define CAP_X_END … #define CAP_Y_START … #define CAP_Y_END … #define CAP_DDA_X_INIT … #define CAP_DDA_X_INC … #define CAP_DDA_Y_INIT … #define CAP_DDA_Y_INC … #define EXT_MEM_CTL0 … #define EXT_MEM_CTL0_7CLK … #define EXT_MEM_CTL0_RAS_1 … #define EXT_MEM_CTL0_RAS2CAS_1 … #define EXT_MEM_CTL0_MULTCAS … #define EXT_MEM_CTL0_ASYM … #define EXT_MEM_CTL0_CAS1ON … #define EXT_MEM_CTL0_FIFOFLUSH … #define EXT_MEM_CTL0_SEQRESET … #define EXT_MEM_CTL1 … #define EXT_MEM_CTL1_PAR … #define EXT_MEM_CTL1_SERPAR … #define EXT_MEM_CTL1_SER … #define EXT_MEM_CTL1_SYNC … #define EXT_MEM_CTL1_VRAM … #define EXT_MEM_CTL1_4K_REFRESH … #define EXT_MEM_CTL1_256Kx4 … #define EXT_MEM_CTL1_512Kx8 … #define EXT_MEM_CTL1_1Mx16 … #define EXT_MEM_CTL2 … #define MEM_CTL2_SIZE_1MB … #define MEM_CTL2_SIZE_2MB … #define MEM_CTL2_SIZE_4MB … #define MEM_CTL2_SIZE_MASK … #define MEM_CTL2_64BIT … #define EXT_HIDDEN_CTL1 … #define EXT_FIFO_CTL … #define EXT_SEQ_MISC … #define EXT_SEQ_MISC_8 … #define EXT_SEQ_MISC_16_RGB565 … #define EXT_SEQ_MISC_32 … #define EXT_SEQ_MISC_24_RGB888 … #define EXT_SEQ_MISC_16_RGB555 … #define EXT_SEQ_MISC_8_RGB332 … #define EXT_SEQ_MISC_16_RGB444 … #define EXT_HIDDEN_CTL4 … #define CURS_MEM_START … #define CAP_PIP_X_START … #define CAP_PIP_X_END … #define CAP_PIP_Y_START … #define CAP_PIP_Y_END … #define EXT_CAP_CTL1 … #define EXT_CAP_CTL2 … #define EXT_CAP_CTL2_ODDFRAMEIRQ … #define EXT_CAP_CTL2_ANYFRAMEIRQ … #define BM_CTRL0 … #define BM_CTRL1 … #define EXT_CAP_MODE1 … #define EXT_CAP_MODE1_8BIT … #define EXT_CAP_MODE1_CCIR656 … #define EXT_CAP_MODE1_IGNOREVGT … #define EXT_CAP_MODE1_ALTFIFO … #define EXT_CAP_MODE1_SWAPUV … #define EXT_CAP_MODE1_MIRRORY … #define EXT_CAP_MODE1_MIRRORX … #define EXT_CAP_MODE2 … #define EXT_CAP_MODE2_CCIRINVOE … #define EXT_CAP_MODE2_CCIRINVVGT … #define EXT_CAP_MODE2_CCIRINVHGT … #define EXT_CAP_MODE2_CCIRINVDG … #define EXT_CAP_MODE2_DATEND … #define EXT_CAP_MODE2_CCIRDGH … #define EXT_CAP_MODE2_FIXSONY … #define EXT_CAP_MODE2_SYNCFREEZE … #define EXT_TV_CTL … #define EXT_DCLK_MULT … #define EXT_DCLK_DIV … #define EXT_DCLK_DIV_VFSEL … #define EXT_MCLK_MULT … #define EXT_MCLK_DIV … #define EXT_LATCH1 … #define EXT_LATCH1_VAFC_EN … #define EXT_FEATURE … #define EXT_FEATURE_BUS_MASK … #define EXT_FEATURE_BUS_PCI … #define EXT_FEATURE_BUS_VL_STD … #define EXT_FEATURE_BUS_VL_LINEAR … #define EXT_FEATURE_1682 … #define EXT_LATCH2 … #define EXT_LATCH2_I2C_CLKEN … #define EXT_LATCH2_I2C_CLK … #define EXT_LATCH2_I2C_DATEN … #define EXT_LATCH2_I2C_DAT … #define EXT_XT_CTL … #define EXT_XT_CAP16 … #define EXT_XT_LINEARFB … #define EXT_XT_PAL … #define EXT_MEM_START … #define HOR_PHASE_SHIFT … #define EXT_SRC_WIDTH … #define EXT_SRC_HEIGHT … #define EXT_X_START … #define EXT_X_END … #define EXT_Y_START … #define EXT_Y_END … #define EXT_SRC_WIN_WIDTH … #define EXT_COLOUR_COMPARE … #define EXT_DDA_X_INIT … #define EXT_DDA_X_INC … #define EXT_DDA_Y_INIT … #define EXT_DDA_Y_INC … #define EXT_VID_FIFO_CTL … #define EXT_VID_FMT … #define EXT_VID_FMT_YUV422 … #define EXT_VID_FMT_RGB555 … #define EXT_VID_FMT_RGB565 … #define EXT_VID_FMT_RGB888_24 … #define EXT_VID_FMT_RGB888_32 … #define EXT_VID_FMT_RGB8 … #define EXT_VID_FMT_RGB4444 … #define EXT_VID_FMT_RGB8T … #define EXT_VID_FMT_DUP_PIX_ZOON … #define EXT_VID_FMT_MOD_3RD_PIX … #define EXT_VID_FMT_DBL_H_PIX … #define EXT_VID_FMT_YUV128 … #define EXT_VID_DISP_CTL1 … #define EXT_VID_DISP_CTL1_INTRAM … #define EXT_VID_DISP_CTL1_IGNORE_CCOMP … #define EXT_VID_DISP_CTL1_NOCLIP … #define EXT_VID_DISP_CTL1_UV_AVG … #define EXT_VID_DISP_CTL1_Y128 … #define EXT_VID_DISP_CTL1_VINTERPOL_OFF … #define EXT_VID_DISP_CTL1_FULL_WIN … #define EXT_VID_DISP_CTL1_ENABLE_WINDOW … #define EXT_VID_FIFO_CTL1 … #define EXT_VID_FIFO_CTL1_OE_HIGH … #define EXT_VID_FIFO_CTL1_INTERLEAVE … #define EXT_ROM_UCB4GH … #define EXT_ROM_UCB4GH_FREEZE … #define EXT_ROM_UCB4GH_ODDFRAME … #define EXT_ROM_UCB4GH_1HL … #define EXT_ROM_UCB4GH_ODD … #define EXT_ROM_UCB4GH_INTSTAT … #define VFAC_CTL1 … #define VFAC_CTL1_CAPTURE … #define VFAC_CTL1_VFAC_ENABLE … #define VFAC_CTL1_FREEZE_CAPTURE … #define VFAC_CTL1_FREEZE_CAPTURE_SYNC … #define VFAC_CTL1_VALIDFRAME_SRC … #define VFAC_CTL1_PHILIPS … #define VFAC_CTL1_MODVINTERPOLCLK … #define VFAC_CTL2 … #define VFAC_CTL2_INVERT_VIDDATAVALID … #define VFAC_CTL2_INVERT_GRAPHREADY … #define VFAC_CTL2_INVERT_DATACLK … #define VFAC_CTL2_INVERT_HSYNC … #define VFAC_CTL2_INVERT_VSYNC … #define VFAC_CTL2_INVERT_FRAME … #define VFAC_CTL2_INVERT_BLANK … #define VFAC_CTL2_INVERT_OVSYNC … #define VFAC_CTL3 … #define VFAC_CTL3_CAP_LARGE_FIFO … #define VFAC_CTL3_CAP_INTERLACE … #define VFAC_CTL3_CAP_HOLD_4NS … #define VFAC_CTL3_CAP_HOLD_2NS … #define VFAC_CTL3_CAP_HOLD_6NS … #define VFAC_CTL3_CAP_HOLD_0NS … #define VFAC_CTL3_CHROMAKEY … #define VFAC_CTL3_CAP_IRQ … #define CAP_MEM_START … #define CAP_MAP_WIDTH … #define CAP_PITCH … #define CAP_CTL_MISC … #define CAP_CTL_MISC_HDIV … #define CAP_CTL_MISC_HDIV4 … #define CAP_CTL_MISC_ODDEVEN … #define CAP_CTL_MISC_HSYNCDIV2 … #define CAP_CTL_MISC_SYNCTZHIGH … #define CAP_CTL_MISC_SYNCTZOR … #define CAP_CTL_MISC_DISPUSED … #define REG_BANK … #define REG_BANK_X … #define REG_BANK_Y … #define REG_BANK_W … #define REG_BANK_T … #define REG_BANK_J … #define REG_BANK_K … /* * Bus-master */ #define BM_VID_ADDR_LOW … #define BM_VID_ADDR_HIGH … #define BM_ADDRESS_LOW … #define BM_ADDRESS_HIGH … #define BM_LENGTH … #define BM_CONTROL … #define BM_CONTROL_ENABLE … #define BM_CONTROL_IRQEN … #define BM_CONTROL_INIT … #define BM_COUNT … /* * TV registers */ #define TV_VBLANK_EVEN_START … #define TV_VBLANK_EVEN_END … #define TV_VBLANK_ODD_START … #define TV_VBLANK_ODD_END … #define TV_SYNC_YGAIN … #define TV_UV_GAIN … #define TV_PED_UVDET … #define TV_UV_BURST_AMP … #define TV_HSYNC_START … #define TV_HSYNC_END … #define TV_Y_DELAY1 … #define TV_Y_DELAY2 … #define TV_UV_DELAY1 … #define TV_BURST_START … #define TV_BURST_END … #define TV_HBLANK_START … #define TV_HBLANK_END … #define TV_PED_EVEN_START … #define TV_PED_EVEN_END … #define TV_PED_ODD_START … #define TV_PED_ODD_END … #define TV_VSYNC_EVEN_START … #define TV_VSYNC_EVEN_END … #define TV_VSYNC_ODD_START … #define TV_VSYNC_ODD_END … #define TV_SCFL … #define TV_SCFH … #define TV_SCP … #define TV_DELAYBYPASS … #define TV_EQL_END … #define TV_SERR_START … #define TV_SERR_END … #define TV_CTL … #define TV_VSYNC_VGA_HS … #define TV_FLICK_XMIN … #define TV_FLICK_XMAX … #define TV_FLICK_YMIN … #define TV_FLICK_YMAX … /* * Graphics Co-processor */ #define CO_REG_CONTROL … #define CO_CTRL_BUSY … #define CO_CTRL_CMDFULL … #define CO_CTRL_FIFOEMPTY … #define CO_CTRL_READY … #define CO_REG_SRC_WIDTH … #define CO_REG_PIXFMT … #define CO_PIXFMT_32BPP … #define CO_PIXFMT_24BPP … #define CO_PIXFMT_16BPP … #define CO_PIXFMT_8BPP … #define CO_REG_FGMIX … #define CO_FG_MIX_ZERO … #define CO_FG_MIX_SRC_AND_DST … #define CO_FG_MIX_SRC_AND_NDST … #define CO_FG_MIX_SRC … #define CO_FG_MIX_NSRC_AND_DST … #define CO_FG_MIX_DST … #define CO_FG_MIX_SRC_XOR_DST … #define CO_FG_MIX_SRC_OR_DST … #define CO_FG_MIX_NSRC_AND_NDST … #define CO_FG_MIX_SRC_XOR_NDST … #define CO_FG_MIX_NDST … #define CO_FG_MIX_SRC_OR_NDST … #define CO_FG_MIX_NSRC … #define CO_FG_MIX_NSRC_OR_DST … #define CO_FG_MIX_NSRC_OR_NDST … #define CO_FG_MIX_ONES … #define CO_REG_FGCOLOUR … #define CO_REG_BGCOLOUR … #define CO_REG_PIXWIDTH … #define CO_REG_PIXHEIGHT … #define CO_REG_X_PHASE … #define CO_REG_CMD_L … #define CO_CMD_L_PATTERN_FGCOL … #define CO_CMD_L_INC_LEFT … #define CO_CMD_L_INC_UP … #define CO_REG_CMD_H … #define CO_CMD_H_BGSRCMAP … #define CO_CMD_H_FGSRCMAP … #define CO_CMD_H_BLITTER … #define CO_REG_SRC1_PTR … #define CO_REG_SRC2_PTR … #define CO_REG_DEST_PTR … #define CO_REG_DEST_WIDTH … /* * Private structure */ struct cfb_info; struct cyberpro_info { … }; #define ID_IGA_1682 … #define ID_CYBERPRO_2000 … #define ID_CYBERPRO_2010 … #define ID_CYBERPRO_5000 … /* * Note! Writing to the Cyber20x0 registers from an interrupt * routine is definitely a bad idea atm. */ int cyber2000fb_attach(struct cyberpro_info *info, int idx); void cyber2000fb_detach(int idx); void cyber2000fb_enable_extregs(struct cfb_info *cfb); void cyber2000fb_disable_extregs(struct cfb_info *cfb);
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