// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2023, Linaro Ltd. All rights reserved. */ #include <linux/delay.h> #include <linux/err.h> #include <linux/interrupt.h> #include <linux/kernel.h> #include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/regulator/consumer.h> #include <linux/slab.h> #include <linux/usb/tcpm.h> #include <linux/usb/typec_mux.h> #include <linux/workqueue.h> #include "qcom_pmic_typec.h" #include "qcom_pmic_typec_port.h" #define TYPEC_SNK_STATUS_REG … #define DETECTED_SNK_TYPE_MASK … #define SNK_DAM_MASK … #define SNK_DAM_500MA … #define SNK_DAM_1500MA … #define SNK_DAM_3000MA … #define SNK_RP_STD … #define SNK_RP_1P5 … #define SNK_RP_3P0 … #define SNK_RP_SHORT … #define TYPEC_SRC_STATUS_REG … #define DETECTED_SRC_TYPE_MASK … #define SRC_HIGH_BATT … #define SRC_DEBUG_ACCESS … #define SRC_RD_OPEN … #define SRC_RD_RA_VCONN … #define SRC_RA_OPEN … #define AUDIO_ACCESS_RA_RA … #define TYPEC_STATE_MACHINE_STATUS_REG … #define TYPEC_ATTACH_DETACH_STATE … #define TYPEC_SM_STATUS_REG … #define TYPEC_SM_VBUS_VSAFE5V … #define TYPEC_SM_VBUS_VSAFE0V … #define TYPEC_SM_USBIN_LT_LV … #define TYPEC_MISC_STATUS_REG … #define TYPEC_WATER_DETECTION_STATUS … #define SNK_SRC_MODE … #define TYPEC_VBUS_DETECT … #define TYPEC_VBUS_ERROR_STATUS … #define TYPEC_DEBOUNCE_DONE … #define CC_ORIENTATION … #define CC_ATTACHED … #define LEGACY_CABLE_STATUS_REG … #define TYPEC_LEGACY_CABLE_STATUS … #define TYPEC_NONCOMP_LEGACY_CABLE_STATUS … #define TYPEC_U_USB_STATUS_REG … #define U_USB_GROUND_NOVBUS … #define U_USB_GROUND … #define U_USB_FMB1 … #define U_USB_FLOAT1 … #define U_USB_FMB2 … #define U_USB_FLOAT2 … #define TYPEC_MODE_CFG_REG … #define TYPEC_TRY_MODE_MASK … #define EN_TRY_SNK … #define EN_TRY_SRC … #define TYPEC_POWER_ROLE_CMD_MASK … #define EN_SRC_ONLY … #define EN_SNK_ONLY … #define TYPEC_DISABLE_CMD … #define TYPEC_VCONN_CONTROL_REG … #define VCONN_EN_ORIENTATION … #define VCONN_EN_VALUE … #define VCONN_EN_SRC … #define TYPEC_CCOUT_CONTROL_REG … #define TYPEC_CCOUT_BUFFER_EN … #define TYPEC_CCOUT_VALUE … #define TYPEC_CCOUT_SRC … #define DEBUG_ACCESS_SRC_CFG_REG … #define EN_UNORIENTED_DEBUG_ACCESS_SRC … #define TYPE_C_CRUDE_SENSOR_CFG_REG … #define EN_SRC_CRUDE_SENSOR … #define EN_SNK_CRUDE_SENSOR … #define TYPEC_EXIT_STATE_CFG_REG … #define BYPASS_VSAFE0V_DURING_ROLE_SWAP … #define SEL_SRC_UPPER_REF … #define USE_TPD_FOR_EXITING_ATTACHSRC … #define EXIT_SNK_BASED_ON_CC … #define TYPEC_CURRSRC_CFG_REG … #define TYPEC_SRC_RP_SEL_330UA … #define TYPEC_SRC_RP_SEL_180UA … #define TYPEC_SRC_RP_SEL_80UA … #define TYPEC_SRC_RP_SEL_MASK … #define TYPEC_INTERRUPT_EN_CFG_1_REG … #define TYPEC_LEGACY_CABLE_INT_EN … #define TYPEC_NONCOMPLIANT_LEGACY_CABLE_INT_EN … #define TYPEC_TRYSOURCE_DETECT_INT_EN … #define TYPEC_TRYSINK_DETECT_INT_EN … #define TYPEC_CCOUT_DETACH_INT_EN … #define TYPEC_CCOUT_ATTACH_INT_EN … #define TYPEC_VBUS_DEASSERT_INT_EN … #define TYPEC_VBUS_ASSERT_INT_EN … #define TYPEC_INTERRUPT_EN_CFG_2_REG … #define TYPEC_SRC_BATT_HPWR_INT_EN … #define MICRO_USB_STATE_CHANGE_INT_EN … #define TYPEC_STATE_MACHINE_CHANGE_INT_EN … #define TYPEC_DEBUG_ACCESS_DETECT_INT_EN … #define TYPEC_WATER_DETECTION_INT_EN … #define TYPEC_VBUS_ERROR_INT_EN … #define TYPEC_DEBOUNCE_DONE_INT_EN … #define TYPEC_DEBOUNCE_OPTION_REG … #define REDUCE_TCCDEBOUNCE_TO_2MS … #define TYPE_C_SBU_CFG_REG … #define SEL_SBU1_ISRC_VAL … #define SEL_SBU2_ISRC_VAL … #define TYPEC_U_USB_CFG_REG … #define EN_MICRO_USB_FACTORY_MODE … #define EN_MICRO_USB_MODE … #define TYPEC_PMI632_U_USB_WATER_PROTECTION_CFG_REG … #define TYPEC_U_USB_WATER_PROTECTION_CFG_REG … #define EN_MICRO_USB_WATER_PROTECTION … #define MICRO_USB_DETECTION_ON_TIME_CFG_MASK … #define MICRO_USB_DETECTION_PERIOD_CFG_MASK … #define TYPEC_PMI632_MICRO_USB_MODE_REG … #define MICRO_USB_MODE_ONLY … /* Interrupt numbers */ #define PMIC_TYPEC_OR_RID_IRQ … #define PMIC_TYPEC_VPD_IRQ … #define PMIC_TYPEC_CC_STATE_IRQ … #define PMIC_TYPEC_VCONN_OC_IRQ … #define PMIC_TYPEC_VBUS_IRQ … #define PMIC_TYPEC_ATTACH_DETACH_IRQ … #define PMIC_TYPEC_LEGACY_CABLE_IRQ … #define PMIC_TYPEC_TRY_SNK_SRC_IRQ … struct pmic_typec_port_irq_data { … }; struct pmic_typec_port { … }; static const char * const typec_cc_status_name[] = …; static const char *rp_unknown = …; static const char *cc_to_name(enum typec_cc_status cc) { … } static const char * const rp_sel_name[] = …; static const char *rp_sel_to_name(int rp_sel) { … } #define misc_to_cc(msic) … #define misc_to_vconn(msic) … static void qcom_pmic_typec_port_cc_debounce(struct work_struct *work) { … } static irqreturn_t pmic_typec_port_isr(int irq, void *dev_id) { … } static int qcom_pmic_typec_port_vbus_detect(struct pmic_typec_port *pmic_typec_port) { … } static int qcom_pmic_typec_port_vbus_toggle(struct pmic_typec_port *pmic_typec_port, bool on) { … } static int qcom_pmic_typec_port_get_vbus(struct tcpc_dev *tcpc) { … } static int qcom_pmic_typec_port_set_vbus(struct tcpc_dev *tcpc, bool on, bool sink) { … } static int qcom_pmic_typec_port_get_cc(struct tcpc_dev *tcpc, enum typec_cc_status *cc1, enum typec_cc_status *cc2) { … } static void qcom_pmic_set_cc_debounce(struct pmic_typec_port *pmic_typec_port) { … } static int qcom_pmic_typec_port_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc) { … } static int qcom_pmic_typec_port_set_polarity(struct tcpc_dev *tcpc, enum typec_cc_polarity pol) { … } static int qcom_pmic_typec_port_set_vconn(struct tcpc_dev *tcpc, bool on) { … } static int qcom_pmic_typec_port_start_toggling(struct tcpc_dev *tcpc, enum typec_port_type port_type, enum typec_cc_status cc) { … } #define TYPEC_INTR_EN_CFG_1_MASK … #define TYPEC_INTR_EN_CFG_2_MASK … static int qcom_pmic_typec_port_start(struct pmic_typec *tcpm, struct tcpm_port *tcpm_port) { … } static void qcom_pmic_typec_port_stop(struct pmic_typec *tcpm) { … } int qcom_pmic_typec_port_probe(struct platform_device *pdev, struct pmic_typec *tcpm, const struct pmic_typec_port_resources *res, struct regmap *regmap, u32 base) { … } const struct pmic_typec_port_resources pm8150b_port_res = …;
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