linux/drivers/usb/typec/ucsi/ucsi_ccg.c

// SPDX-License-Identifier: GPL-2.0
/*
 * UCSI driver for Cypress CCGx Type-C controller
 *
 * Copyright (C) 2017-2018 NVIDIA Corporation. All rights reserved.
 * Author: Ajay Gupta <[email protected]>
 *
 * Some code borrowed from drivers/usb/typec/ucsi/ucsi_acpi.c
 */
#include <linux/acpi.h>
#include <linux/delay.h>
#include <linux/firmware.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/usb/typec_dp.h>

#include <asm/unaligned.h>
#include "ucsi.h"

enum enum_fw_mode {};

#define CCGX_RAB_DEVICE_MODE
#define CCGX_RAB_INTR_REG
#define DEV_INT
#define PORT0_INT
#define PORT1_INT
#define UCSI_READ_INT
#define CCGX_RAB_JUMP_TO_BOOT
#define TO_BOOT
#define TO_ALT_FW
#define CCGX_RAB_RESET_REQ
#define RESET_SIG
#define CMD_RESET_I2C
#define CMD_RESET_DEV
#define CCGX_RAB_ENTER_FLASHING
#define FLASH_ENTER_SIG
#define CCGX_RAB_VALIDATE_FW
#define CCGX_RAB_FLASH_ROW_RW
#define FLASH_SIG
#define FLASH_RD_CMD
#define FLASH_WR_CMD
#define FLASH_FWCT1_WR_CMD
#define FLASH_FWCT2_WR_CMD
#define FLASH_FWCT_SIG_WR_CMD
#define CCGX_RAB_READ_ALL_VER
#define CCGX_RAB_READ_FW2_VER
#define CCGX_RAB_UCSI_CONTROL
#define CCGX_RAB_UCSI_CONTROL_START
#define CCGX_RAB_UCSI_CONTROL_STOP
#define CCGX_RAB_UCSI_DATA_BLOCK(offset)
#define REG_FLASH_RW_MEM
#define DEV_REG_IDX
#define CCGX_RAB_PDPORT_ENABLE
#define PDPORT_1
#define PDPORT_2
#define CCGX_RAB_RESPONSE
#define ASYNC_EVENT

/* CCGx events & async msg codes */
#define RESET_COMPLETE
#define EVENT_INDEX
#define PORT_CONNECT_DET
#define PORT_DISCONNECT_DET
#define ROLE_SWAP_COMPELETE

/* ccg firmware */
#define CYACD_LINE_SIZE
#define CCG4_ROW_SIZE
#define FW1_METADATA_ROW
#define FW2_METADATA_ROW
#define FW_CFG_TABLE_SIG_SIZE

static int secondary_fw_min_ver =;

enum enum_flash_mode {};

static const char * const ccg_fw_names[] =;

struct ccg_dev_info {} __packed;

struct version_format {} __packed;

/*
 * Firmware version 3.1.10 or earlier, built for NVIDIA has known issue
 * of missing interrupt when a device is connected for runtime resume
 */
#define CCG_FW_BUILD_NVIDIA
#define CCG_OLD_FW_VERSION

/* Firmware for Tegra doesn't support UCSI ALT command, built
 * for NVIDIA has known issue of reporting wrong capability info
 */
#define CCG_FW_BUILD_NVIDIA_TEGRA

/* Altmode offset for NVIDIA Function Test Board (FTB) */
#define NVIDIA_FTB_DP_OFFSET
#define NVIDIA_FTB_DBG_OFFSET

struct version_info {};

struct fw_config_table {};

/* CCGx response codes */
enum ccg_resp_code {};

#define CCG_EVENT_MAX

struct ccg_cmd {};

struct ccg_resp {};

struct ucsi_ccg_altmode {} __packed;

#define CCGX_MESSAGE_IN_MAX
struct op_region {};

struct ucsi_ccg {};

static int ccg_read(struct ucsi_ccg *uc, u16 rab, u8 *data, u32 len)
{}

static int ccg_write(struct ucsi_ccg *uc, u16 rab, const u8 *data, u32 len)
{}

static int ccg_op_region_update(struct ucsi_ccg *uc, u32 cci)
{}

static int ucsi_ccg_init(struct ucsi_ccg *uc)
{}

static void ucsi_ccg_update_get_current_cam_cmd(struct ucsi_ccg *uc, u8 *data)
{}

static bool ucsi_ccg_update_altmodes(struct ucsi *ucsi,
				     struct ucsi_altmode *orig,
				     struct ucsi_altmode *updated)
{}

static void ucsi_ccg_update_set_new_cam_cmd(struct ucsi_ccg *uc,
					    struct ucsi_connector *con,
					    u64 *cmd)
{}

/*
 * Change the order of vdo values of NVIDIA test device FTB
 * (Function Test Board) which reports altmode list with vdo=0x3
 * first and then vdo=0x. Current logic to assign mode value is
 * based on order in altmode list and it causes a mismatch of CON
 * and SOP altmodes since NVIDIA GPU connector has order of vdo=0x1
 * first and then vdo=0x3
 */
static void ucsi_ccg_nvidia_altmode(struct ucsi_ccg *uc,
				    struct ucsi_altmode *alt)
{}

static int ucsi_ccg_read_version(struct ucsi *ucsi, u16 *version)
{}

static int ucsi_ccg_read_cci(struct ucsi *ucsi, u32 *cci)
{}

static int ucsi_ccg_read_message_in(struct ucsi *ucsi, void *val, size_t val_len)
{}

static int ucsi_ccg_async_control(struct ucsi *ucsi, u64 command)
{}

static int ucsi_ccg_sync_control(struct ucsi *ucsi, u64 command)
{}

static const struct ucsi_operations ucsi_ccg_ops =;

static irqreturn_t ccg_irq_handler(int irq, void *data)
{}

static int ccg_request_irq(struct ucsi_ccg *uc)
{}

static void ccg_pm_workaround_work(struct work_struct *pm_work)
{}

static int get_fw_info(struct ucsi_ccg *uc)
{}

static inline bool invalid_async_evt(int code)
{}

static void ccg_process_response(struct ucsi_ccg *uc)
{}

static int ccg_read_response(struct ucsi_ccg *uc)
{}

/* Caller must hold uc->lock */
static int ccg_send_command(struct ucsi_ccg *uc, struct ccg_cmd *cmd)
{}

static int ccg_cmd_enter_flashing(struct ucsi_ccg *uc)
{}

static int ccg_cmd_reset(struct ucsi_ccg *uc)
{}

static int ccg_cmd_port_control(struct ucsi_ccg *uc, bool enable)
{}

static int ccg_cmd_jump_boot_mode(struct ucsi_ccg *uc, int bl_mode)
{}

static int
ccg_cmd_write_flash_row(struct ucsi_ccg *uc, u16 row,
			const void *data, u8 fcmd)
{}

static int ccg_cmd_validate_fw(struct ucsi_ccg *uc, unsigned int fwid)
{}

static bool ccg_check_vendor_version(struct ucsi_ccg *uc,
				     struct version_format *app,
				     struct fw_config_table *fw_cfg)
{}

static bool ccg_check_fw_version(struct ucsi_ccg *uc, const char *fw_name,
				 struct version_format *app)
{}

static int ccg_fw_update_needed(struct ucsi_ccg *uc,
				enum enum_flash_mode *mode)
{}

static int do_flash(struct ucsi_ccg *uc, enum enum_flash_mode mode)
{}

/*******************************************************************************
 * CCG4 has two copies of the firmware in addition to the bootloader.
 * If the device is running FW1, FW2 can be updated with the new version.
 * Dual firmware mode allows the CCG device to stay in a PD contract and support
 * USB PD and Type-C functionality while a firmware update is in progress.
 ******************************************************************************/
static int ccg_fw_update(struct ucsi_ccg *uc, enum enum_flash_mode flash_mode)
{}

static int ccg_restart(struct ucsi_ccg *uc)
{}

static void ccg_update_firmware(struct work_struct *work)
{}

static ssize_t do_flash_store(struct device *dev,
			      struct device_attribute *attr,
			      const char *buf, size_t n)
{}

static DEVICE_ATTR_WO(do_flash);

static struct attribute *ucsi_ccg_attrs[] =;
ATTRIBUTE_GROUPS();

static int ucsi_ccg_probe(struct i2c_client *client)
{}

static void ucsi_ccg_remove(struct i2c_client *client)
{}

static const struct of_device_id ucsi_ccg_of_match_table[] =;
MODULE_DEVICE_TABLE(of, ucsi_ccg_of_match_table);

static const struct i2c_device_id ucsi_ccg_device_id[] =;
MODULE_DEVICE_TABLE(i2c, ucsi_ccg_device_id);

static const struct acpi_device_id amd_i2c_ucsi_match[] =;
MODULE_DEVICE_TABLE(acpi, amd_i2c_ucsi_match);

static int ucsi_ccg_resume(struct device *dev)
{}

static int ucsi_ccg_runtime_suspend(struct device *dev)
{}

static int ucsi_ccg_runtime_resume(struct device *dev)
{}

static const struct dev_pm_ops ucsi_ccg_pm =;

static struct i2c_driver ucsi_ccg_driver =;

module_i2c_driver();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();