// SPDX-License-Identifier: GPL-2.0-only /* * Aspeed 24XX/25XX I2C Controller. * * Copyright (C) 2012-2017 ASPEED Technology Inc. * Copyright 2017 IBM Corporation * Copyright 2017 Google, Inc. */ #include <linux/clk.h> #include <linux/completion.h> #include <linux/err.h> #include <linux/errno.h> #include <linux/i2c.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/irq.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/of_platform.h> #include <linux/platform_device.h> #include <linux/reset.h> #include <linux/slab.h> /* I2C Register */ #define ASPEED_I2C_FUN_CTRL_REG … #define ASPEED_I2C_AC_TIMING_REG1 … #define ASPEED_I2C_AC_TIMING_REG2 … #define ASPEED_I2C_INTR_CTRL_REG … #define ASPEED_I2C_INTR_STS_REG … #define ASPEED_I2C_CMD_REG … #define ASPEED_I2C_DEV_ADDR_REG … #define ASPEED_I2C_BYTE_BUF_REG … /* Global Register Definition */ /* 0x00 : I2C Interrupt Status Register */ /* 0x08 : I2C Interrupt Target Assignment */ /* Device Register Definition */ /* 0x00 : I2CD Function Control Register */ #define ASPEED_I2CD_MULTI_MASTER_DIS … #define ASPEED_I2CD_SDA_DRIVE_1T_EN … #define ASPEED_I2CD_M_SDA_DRIVE_1T_EN … #define ASPEED_I2CD_M_HIGH_SPEED_EN … #define ASPEED_I2CD_SLAVE_EN … #define ASPEED_I2CD_MASTER_EN … /* 0x04 : I2CD Clock and AC Timing Control Register #1 */ #define ASPEED_I2CD_TIME_TBUF_MASK … #define ASPEED_I2CD_TIME_THDSTA_MASK … #define ASPEED_I2CD_TIME_TACST_MASK … #define ASPEED_I2CD_TIME_SCL_HIGH_SHIFT … #define ASPEED_I2CD_TIME_SCL_HIGH_MASK … #define ASPEED_I2CD_TIME_SCL_LOW_SHIFT … #define ASPEED_I2CD_TIME_SCL_LOW_MASK … #define ASPEED_I2CD_TIME_BASE_DIVISOR_MASK … #define ASPEED_I2CD_TIME_SCL_REG_MAX … /* 0x08 : I2CD Clock and AC Timing Control Register #2 */ #define ASPEED_NO_TIMEOUT_CTRL … /* 0x0c : I2CD Interrupt Control Register & * 0x10 : I2CD Interrupt Status Register * * These share bit definitions, so use the same values for the enable & * status bits. */ #define ASPEED_I2CD_INTR_RECV_MASK … #define ASPEED_I2CD_INTR_SDA_DL_TIMEOUT … #define ASPEED_I2CD_INTR_BUS_RECOVER_DONE … #define ASPEED_I2CD_INTR_SLAVE_MATCH … #define ASPEED_I2CD_INTR_SCL_TIMEOUT … #define ASPEED_I2CD_INTR_ABNORMAL … #define ASPEED_I2CD_INTR_NORMAL_STOP … #define ASPEED_I2CD_INTR_ARBIT_LOSS … #define ASPEED_I2CD_INTR_RX_DONE … #define ASPEED_I2CD_INTR_TX_NAK … #define ASPEED_I2CD_INTR_TX_ACK … #define ASPEED_I2CD_INTR_MASTER_ERRORS … #define ASPEED_I2CD_INTR_ALL … /* 0x14 : I2CD Command/Status Register */ #define ASPEED_I2CD_SCL_LINE_STS … #define ASPEED_I2CD_SDA_LINE_STS … #define ASPEED_I2CD_BUS_BUSY_STS … #define ASPEED_I2CD_BUS_RECOVER_CMD … /* Command Bit */ #define ASPEED_I2CD_M_STOP_CMD … #define ASPEED_I2CD_M_S_RX_CMD_LAST … #define ASPEED_I2CD_M_RX_CMD … #define ASPEED_I2CD_S_TX_CMD … #define ASPEED_I2CD_M_TX_CMD … #define ASPEED_I2CD_M_START_CMD … #define ASPEED_I2CD_MASTER_CMDS_MASK … /* 0x18 : I2CD Slave Device Address Register */ #define ASPEED_I2CD_DEV_ADDR_MASK … enum aspeed_i2c_master_state { … }; enum aspeed_i2c_slave_state { … }; struct aspeed_i2c_bus { … }; static int aspeed_i2c_reset(struct aspeed_i2c_bus *bus); static int aspeed_i2c_recover_bus(struct aspeed_i2c_bus *bus) { … } #if IS_ENABLED(CONFIG_I2C_SLAVE) static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status) { … } #endif /* CONFIG_I2C_SLAVE */ /* precondition: bus.lock has been acquired. */ static void aspeed_i2c_do_start(struct aspeed_i2c_bus *bus) { … } /* precondition: bus.lock has been acquired. */ static void aspeed_i2c_do_stop(struct aspeed_i2c_bus *bus) { … } /* precondition: bus.lock has been acquired. */ static void aspeed_i2c_next_msg_or_stop(struct aspeed_i2c_bus *bus) { … } static int aspeed_i2c_is_irq_error(u32 irq_status) { … } static u32 aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus, u32 irq_status) { … } static irqreturn_t aspeed_i2c_bus_irq(int irq, void *dev_id) { … } static int aspeed_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) { … } static u32 aspeed_i2c_functionality(struct i2c_adapter *adap) { … } #if IS_ENABLED(CONFIG_I2C_SLAVE) /* precondition: bus.lock has been acquired. */ static void __aspeed_i2c_reg_slave(struct aspeed_i2c_bus *bus, u16 slave_addr) { … } static int aspeed_i2c_reg_slave(struct i2c_client *client) { … } static int aspeed_i2c_unreg_slave(struct i2c_client *client) { … } #endif /* CONFIG_I2C_SLAVE */ static const struct i2c_algorithm aspeed_i2c_algo = …; static u32 aspeed_i2c_get_clk_reg_val(struct device *dev, u32 clk_high_low_mask, u32 divisor) { … } static u32 aspeed_i2c_24xx_get_clk_reg_val(struct device *dev, u32 divisor) { … } static u32 aspeed_i2c_25xx_get_clk_reg_val(struct device *dev, u32 divisor) { … } /* precondition: bus.lock has been acquired. */ static int aspeed_i2c_init_clk(struct aspeed_i2c_bus *bus) { … } /* precondition: bus.lock has been acquired. */ static int aspeed_i2c_init(struct aspeed_i2c_bus *bus, struct platform_device *pdev) { … } static int aspeed_i2c_reset(struct aspeed_i2c_bus *bus) { … } static const struct of_device_id aspeed_i2c_bus_of_table[] = …; MODULE_DEVICE_TABLE(of, aspeed_i2c_bus_of_table); static int aspeed_i2c_probe_bus(struct platform_device *pdev) { … } static void aspeed_i2c_remove_bus(struct platform_device *pdev) { … } static struct platform_driver aspeed_i2c_bus_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
Codebase Browser
linux